Age | Commit message (Collapse) | Author |
|
|
|
Set bus type appropriately. fixes bug 25002
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
|
|
We don't use the invisible memory yet and on cards with
large amounts of vram this can cause the top of GART
calculation to overflow.
Fixes bug fdo bug 24301:
http://bugs.freedesktop.org/show_bug.cgi?id=24301
v2: only clamp cards with more than 512 MB. This seems
to cause problems on some older cards due to the way the
drm and ddx set up the internal memory map.
|
|
We don't use the invisible memory yet and on cards with
large amounts of vram this can cause the top of GART
calculation to overflow.
Fixes bug fdo bug 24301:
http://bugs.freedesktop.org/show_bug.cgi?id=24301
|
|
|
|
DPMS header was split into dpms.h (client) and dpmsconst.h (server). Drivers
need to include dpmsconst.h if xextproto 7.1 is available.
Signed-off-by: Peter Hutterer <peter.hutterer@who-t.net>
Conflicts:
src/drmmode_display.c
|
|
(cherry picked from commit 63c873cbd4d1d21d9f688028c0900c79fadc42c1)
|
|
(cherry picked from commit 21a621c297ac71c65c239ea960c38706e718b91c)
|
|
|
|
From RHEL QE testing, we could end up with the cursor at 0 since
we think EXA is in use when really it isn't. the info->useEXA = FALSe
might be unnecessary but better to be explicit
stable: fix slightly different
Signed-off-by: Dave Airlie <airlied@redhat.com>
|
|
- r1xx-rv350 chips have the old pci gart
- rv380+ chips have newer pcie gart
Select the right kind regardless of whether the user selects
PCI or PCIE.
|
|
R5xx/r6xx support isn't really experimental anymore
|
|
IIRC, the old randr code used to use this to use for front buffer sizing,
but it has since been changed.
|
|
Fixes garbage being visible shortly on server startup or when VT switching back
to X.
|
|
|
|
|
|
|
|
UTS/DFS/Xv
Doesn't seem to be reliable on AGP.
fixes bugs: 20436, 20236, several reports on ML and IRC
|
|
All radeons have them. Thanks to Yang Zhao for figuring
this out.
|
|
We only support EXA and and only with DRI.
|
|
The display detect routines can change these which causes
havok with some bioses.
|
|
As VRAM gets zeroed out over s/r, we need to reload the
shaders.
|
|
|
|
|
|
If set, enables the use of atombios for modesetting
on r4xx cards.
|
|
fallback to shadowfb if DRI fails pre init
|
|
|
|
Select between SW and HW-assisted uploads
|
|
Since the rn50 only has one crtc, but often has multiple outputs,
occasionally one of the outputs doesn't get a crtc assigned eventhough
the outputs may have common modes. If we see an output with modes, but
no crtc, assign it so all the attached outputs light up.
fixes bugs 19457 and similar ones
|
|
|
|
|
|
git+ssh://agd5f@git.freedesktop.org/git/xorg/driver/xf86-video-ati
|
|
|
|
Please test if you have an RS600
|
|
|
|
|
|
missed this in cadae2a8d9979b2d61eae7d1f7a9ab8f5eb28e83
|
|
|
|
many thanks to app4des on IRC for helping me sort this out.
|
|
should fix bug 19984
|
|
|
|
|
|
additional fix needed for bug 16781
|
|
If the crtc timing isn't setup, you might get stuck in a loop
in the BlankCRTC command table
fixes bug 16781
|
|
Always save the GART table with the RADEON_SURFACE_CNTL register
zero'd out to make sure we always use the same endinanness.
fixed up as per Michel's suggestion for endianness.
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Dave Airlie <airlied@linux.ie>
|
|
|
|
|
|
This fixes some VT switch issues on some chips
|
|
This stops the MC_FB_LOCATION getting reassigned to 0, which
is really bad thing to happen.
I've had reported memory corruption on these cards so hopefully this
fixes it.
|
|
While in theory it's possible for the PrepareAccess hook to fail on big endian
platforms, in practice it isn't at this point because there's no other users of
the surface registers.
|