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- use pPriv->w/h directly for tex coords
- take src x/y offset into account when calculating tex coords
- when copying data, only optimize for y clipping. In order
to deal with the x clipping optimization, the copy routines
or tex coords would need to be fixed. This should fix clipping
problems with the current code.
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R5xx/r6xx support isn't really experimental anymore
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Provides consistent output
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Doesn't affect performance, but docs indicate its the right
thing to do.
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no longer needed as bicubic is the only thing that uses
the old csc code.
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We were overwriting the coord fetch address with the first
tex fetch. Seemed to work however, luck I guess. Reorder
the fetches to write to temp0 last.
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- native planar support
- Xv attributes
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- brightness, contrast, hue, etc.
- TODO: implement gamma
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- consolidate common r2xx csc shader code
- always use shader based csc for both packed and planar
formats
- always use native planar csc on r1xx
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- convert macros to more meaningful VTX_OUT_4 and VTX_OUT_6
names to reflect that they actually do
- fix indenting
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rather than sending a new draw packet for each rect
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rather than sending a new draw packet for each rect
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textured video
This implements
contrast/brightness/hue/saturation controls for r200/r300 plus gamma (same
gamma value for all channels used though separate values would be trivial)
control for r300.
Some issues left:
- only r200/r300
- still can't be combined with bicubic
- controls will silently cease to work if the format used is packed and not
planar (except for rv250)
- gamma range is from 100 to 10000 corresponding to 0.1 and 10.0 like used in
overlay. However, usable range is far smaller. Over 2.0 picture gets dark
pretty quickly, and below 0.6 or so black seems to turn into purple (I've
verified that even with gamma 1.0 black actually often seems to be RGB 1/0/1 so
this explains this since that gets amplified by low gamma values - not sure if
this is a rounding problem somewhere, bogus reference values or is somehow
expected).
- gamma adds a bit too many instructions for my taste (7) though the
alternative (3 texture lookups + some swizzling instructions) doesn't seem any
better.
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Alex seems to think this might affect some other chips
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The rv410 hw i2c block appears to hold down whatever i2c lines
it is connected to when in reset, so when doing DDC change hw i2c to
point at different i2c lines.
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Should fix Masta-G's issue reported on IRC.
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When using a mask, set explicit cache partitions for
each texture. Gives 1% performance improvement in
x11perf with anti-aliased text.
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This reverts commit f8c7d6a6162196a743f6885ecaf63ba50de1722a.
This is apparently still needed for some setups, however, I can't
reproduce this locally anymore.
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This fixes corruption for some users
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Fixes an M26 hang reported by tormod on IRC
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Force lower power mode and switch to a lower mode
when idle.
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Dyanmically switch between power states. Switch to a low
power state when the system is idle (DPMS off).
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1 lane seems to cause occasional corruption when
blitting to/from gart memory.
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Force the chip to a low power mode at the expense
of performance.
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- replaces DynamicClocks Option as the name was misleading
- unified interface for atom and com based bioses
- fix up clock gating code for newer r3xx asics
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This is an attempt to rationalise the code using the register info
files available to me here.
Further info is required:
r350 check for stop_req > 15 then subtract 10: what other chips need it?
get rs480 working instead of using magic.
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IIRC, the old randr code used to use this to use for front buffer sizing,
but it has since been changed.
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Fixes garbage being visible shortly on server startup or when VT switching back
to X.
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- remove cases that aren't possible (e.g., no TMDSA on DCE3 cards)
- condense duplicate cases
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disable the dig transmitter and encoder before setup and enable
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