Age | Commit message (Collapse) | Author |
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I've seen RN50s with 64MB of RAM that are slow as molasses, this
should fix them.
RH bug 556400
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Signed-off-by: Kusanagi Kouichi <slash@ac.auone-net.jp>
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FRAG & TILE buffer are unused but still they need
to be associated with a valid relocation so that
userspace can't try to abuse them to overwritte
GART and then try to write anywhere in system
memory.
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Seems we have to not do auxch DDC if we aren't talking to a DP
sink.
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Noticed by Maarten Maathuis.
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Due to heat issues. fixes bug 25992
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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In case of a DP->DVI adapter for example.
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Should fix fdo bug 25931
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Noticed by John R. Dunning. Fix taken from radeonfb.
I'm not sure if this sequence would be useful on any PC
laptops or not so make it mac specific for now.
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fixes mac laptops without an edid
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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radeon_dummy_bufmgr.h
radeon_vbo.h
simple_list.h
Replace leading spaces with tab for radeon_atomwrapper.h
Signed-off-by: Gaetan Nadon <memsize@videotron.ca>
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It appears that RS4xx chips need to have the crtc
enabled when the timing is programmed.
agd5f: minor fixes/cleanup of the original patch
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It's only fair.
Compile-tested only.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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This should hopefully help the problems with flickering
and blinking monitors reported on some systems. If there
are problems, the old PLL algorithm can be selected with:
Option "NewPLL" "FALSE"
in the device section of your X config.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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noticed by Matthijs Kooijman on fdo bug 22140
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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The dimension of an XvImage is limited to 2048 x 2048 even if an adaptor
supports larger image.
XvCreateImage and XvShmCreateImage lower the width or height of an image.
XvPutImage and XvShmPutImage return BadValue.
The cause is that 2048 is hardcoded in RADEONQueryImageAttributes.
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This ports the mesa DMA buffer handling with the 3 lists,
Signed-off-by: Dave Airlie <airlied@redhat.com>
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sync polarity, etc. This will likely fix LVDS problems
on some laptops.
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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All of the drawing ops were the exact same modulo the vtx size,
this along with the vertex buffer wrapping code could all be consolidated
into a smaller set of functions.
This also adds 2 VBO which we switch between, and merges a #define to
enable the multiple operations in one CS under KMS mode.
Multi-operation still isn't working though.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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When acceleration is disabled we need to reallocate
a new shadow framebuffer and we should also avoid
calling any EXA function as EXA is disabled in such
case.
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According to the DCE3 docs we should only use DAC1/2 not
CV1/TV OutputControl, also my rv730 bios doesn't have any
CV1/TV tables.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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a) crev and frev are reversed
b) my rv730 bios only has one mode in it, so
bounds check the table size.
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turn this off for now, on my rv635 desktop, I started getting blanks
in places in firefox and the odd bit of font corruption, need to
track that down.
This reverts commit 985a065518b1d33599de33f7fe082d3302db58a6.
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This moves to a boolean instead of using VRAM sizing.
as per Michel's suggestions on list.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This switches on multiple ops in a single CS under KMS/DRI2.
It gets for on a Pentium D 3 + rv740 from 330,000 to 500,000
with x11perf -aa10text.
It also knocks a couple of seconds of gtkperf -a
Signed-off-by: Dave Airlie <airlied@redhat.com>
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To put multiple ops into one CS, you can't just discard the whole
IB. This add supports for reset the CS cdw to the correct place
after an op discards.
Still doesn't enable the final accel bits.
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this is needed for server recycle.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This changes the vertex buffer index to be an offset, and
records the start of the vb for each operation and uses
that to set the operations up.
This still flushes after each operation to make sure we have
no regressions in non-kms/kms cases.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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This just merges it with the main kms cs flush
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In some cases the atom transmitter table sets the
golden value of this reg differently which some monitors
don't like. I haven't had time to dig further, so this
works around it for now.
Fixes fdo bug 24313
Signed-off-by: Alex Deucher <alexdeucher@gmail.com>
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