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regenerate, just run "python bicubic_table.py > bicubic_table.h".
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fixes bug 17214
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Always set the overlay base address such that the buffer offsets are as small
as possible. This could still break in theory if the buffers were more than
128 MB apart, but in reality this can't happen ATM because we always allocate
a single memory area for all buffers.
Fixes http://bugs.freedesktop.org/show_bug.cgi?id=16845 .
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Seems higher dotclocks prefer a higher FB div.
Someone with a lot of should try and find out where
the div sweet spots are for various dotclock ranges.
fixes bug 17125
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They should only affect 3D and init3d() should take care of that case
noticed by libv on IRC.
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thanks to Michael Larabel for testing
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- unify the ddc and i2c code
- add gpio mask support for legacy chips
- remove the magic gpio dance for ancient monitors
(if you have an ancient monitor that ddc stops
working on let me know). This should speed up DDC
on legacy chips.
-- radeon sw gpio i2c --
4 sets of gpio registers for clk and data and corresponding bit masks
mask - locks the gpio for use by sw
get - reads the value off the gpio pad
put - sets the gpio direction to output
a - "other stuff" On legacy chips you clear them if you want
to use a gpio for i2c. In some cases they are used for the
output value when the gpio in the output state.
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Some M6 chips have a faulty MEM_SIZE register that in
some cases reports 0 on 8 MB cards. On EnterVT we check
the MEM_SIZE reg as a check to see if the card is posted or
not. Since this reg returns 0, the driver attempts to post
the card which can lead to a hang. Switch this to check if
either crtc is active as is done in the bios init code.
fixes bug 13994
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- I mixed up the regs previously
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Connector tables should be setup properly already and this
check breaks systems with 2 DACs and 1 crtc like the es1000.
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RS4xx chips have a tmds init table in the mobile info table
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- Hopefully finally fix DDC on RS4xx chips
- RS3xx/RS4xx do not have internal TMDS
- general quirk handling cleanup
- we don't currently support mm gpio for external TMDS
so return false.
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Patch from Calvin with some cleanups from me.
No support for PAL yet.
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This may fix DDC on rv770 cards.
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- r1xx - switch from tri fan to rect list
- r2xx/r3xx/r4xx/r5xx - switch from tri fan to quad list
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- debian bug 492457
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- support for LB allocation
- MC priority bumps for display1/2 on RV515 variants and RS690
If you are having display underflow problems (flickering on sides of
screen in high res modes, etc.) on RV515 or RS690 boards, try setting:
Option "DisplayPriority" "HIGH" in your config.
- still no support for full display watermark programming yet
Something similar might be useful in rhd as well.
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- makes crtc1 and crtc2 watermark setup independant.
- fixes the case where only crtc2 is active
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This lets the DRM know it can safely disable the vblank interrupts.
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Noticed by fnord42 on IRC.
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This patch fixes the console switch for me on R5xx.
There are two aspects to it:
- Fix the ordering of avivo_restore() to better match what's
happening in the driver & ATOM, properly locking/unlocking and
only enabling the CRTCs after everything has been properly
programmed.
- Don't ASIC_INIT if the card has any CRTC enabled. This is the
best I came up with for avoiding spurrious ASIC_INIT on cards that
-are- POSTed but don't have the BIOS coming from c0000 on x86. The
problem with spurrious ASIC_INIT is that we do it before we do
RADEONSave(), so that screws up the console switch.
Note that I think we also should save/restore the palette, I don't think
we do. right now, it's a minor issue for me because I fixed offb to be
able to set it on AVIVO's but it might still have to be done in the long
run.
Tested with a VGA analog setup on DACA and a DVI setup on TMDS 0. I
haven't tested any other combo but that should get us going.
Cheers,
Ben.
Signed-off-by: Dave Airlie <airlied@redhat.com>
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fixes bug 15954
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locks/unlocks the crtc/grph/mode regs before updating the crtc
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This makes sure the driver ends up with a DT_NEEDED reference to
the libraries it's using.
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pci id from legume on #radeon
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This is a cleaned up (in as much as atombios can be..) of benh's patch.
airlied - removed benh's debugging for now, it might need to be put back later..
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adds pci ids and one register from AMD code
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fixes bug 14904
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This reverts commit 22c6ca0d5d226c725ba448e5db63fdba9e32332c.
There seems to be an ordering issue in that causes a nasty hang
if the DRI is enabled. This needs more investigation.
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need to set modes after init accel architecture
reported-by: Christoph Bartoschek <bartoschek@or.uni-bonn.de>
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We never test the other codepath and I don't think I've ever recommended it
for anyone.
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Some RS4xx chips had the DRI disabled by default.
With the recent drm and ddx changes these chips have been
reported to work now with the DRI.
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This doesn't have anything to do with the package version.
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It seems only RS300/350/400/480 are missing the primary dac
See bug 15708
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This reverts commit e78e8a21b4040cd7f1983c241c860d9209398396.
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