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- remove cases that aren't possible (e.g., no TMDSA on DCE3 cards)
- condense duplicate cases
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disable the dig transmitter and encoder before setup and enable
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Should fix bug 21050
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Patch from Eduard Fuchs with some cleanup from me.
Tested at 32 bpp on MPC8641HPCN board (PowerPC) with
HD2400 PCIe card
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fixes 10fbbac4bed59e12ad794ac873dd415d9ee4e340
fixes bugs 20796 and 20979
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fixes f061308e7abcf93d1612681b935387fee23e0a24
fixes bugs 20796 and 20979
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should fix bug 13872
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fixes bug 20796
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Noticed by sroland on IRC.
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- move to vram storage
- move swizzle logic to tex setup
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3 regs: 1 bit per bool, 32 bools per ps/vs/gs
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size needs to be calculated after dstPitch adjustments, got already fixed
for earlier than R600 chips by planar textured yuv patches, clean this up.
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uses 3 textures for planar yuv and does yuv->rgb conversion in the shader.
Similar to r300 code, but might have precision issues - hardware alu should
have enough precision but hardware consts are only 8bit and we'd want
at least 11.
This also enables textured video on rv250 (and also supports packed yuv
on that chip by using basically the same shader with packed data).
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uses 3 textures for planar yuv and does yuv->rgb conversion in the shader.
small performance advantage, but manual texture cache setting is necessary
otherwise it may be measurably slower (but probably not relevant) in some
cases.
Unlike some other drivers, using MADs instead of DP3s, since this requires
less instructions due to no MOVs are required, the end result is the same
though the constants need to be different.
Use of this is user settable for now (XV_HWPLANAR attrib).
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This fixes some oddities observed when the video is only partly visible.
Instead of recalculating the geometry of the video, always use the same.
Also fixes a assignment present twice, and another issue (bring in line with
what the overlay code does).
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should fix bug 20814
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DVI seems to have issues with low dotclocks, so
use the scaler instead.
Fixes bug 20754
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should now allow accel up the hw max of 8192x8192
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- fix purple hue when using ATOMTvOut option
- fix TV load detection on newer r6xx/r7xx chips
- disable CV for now
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UTS/DFS/Xv
Doesn't seem to be reliable on AGP.
fixes bugs: 20436, 20236, several reports on ML and IRC
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bug 20647
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Noticed Christiaan van Dijk.
Should fix bug 20510
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the bios scratch registers keep 3 types of state for each output:
1. dpms
2. active
3. connected
some of the command tables use the active flags. We used to set the active
flags based on dpms state, but instead set them based on whether they are
connected or not.
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All radeons have them. Thanks to Yang Zhao for figuring
this out.
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Avoids an additional function call.
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Don't wait for engine idle if we haven't initialized the engine.
Behavior should be consistent with versions of the driver prior
to accel support being added.
Should fix bug 20645
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We only support EXA and and only with DRI.
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The display detect routines can change these which causes
havok with some bioses.
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As VRAM gets zeroed out over s/r, we need to reload the
shaders.
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Values for OFFSET_[XYZ] are 5-bits two's-complement fixed-point with
one-bit after decimal point. Values in [-8.0, 7.5] are valid. Inputs
that do not exactly land on 0.5 increments are rounded towards 0 to the
nearest increment.
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