From a34a8b37afbea6ed4bf8ca42364195e174250c48 Mon Sep 17 00:00:00 2001
From: Alex Deucher <alexdeucher@gmail.com>
Date: Wed, 1 Apr 2009 15:23:17 -0400
Subject: Set default low power PCIE lanes to 2

1 lane seems to cause occasional corruption when
blitting to/from gart memory.
---
 src/radeon_pm.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/radeon_pm.c b/src/radeon_pm.c
index d518998a..ac6b972b 100644
--- a/src/radeon_pm.c
+++ b/src/radeon_pm.c
@@ -589,7 +589,7 @@ void RADEONStaticLowPowerMode(ScrnInfoPtr pScrn, Bool enable)
 	    RADEONSetEngineClock(pScrn, sclk/2);
 
 	if (info->cardType == CARD_PCIE)
-	    RADEONSetPCIELanes(pScrn, 1);
+	    RADEONSetPCIELanes(pScrn, 2);
 
 	info->low_power_mode = TRUE;
     } else {
-- 
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