From acc5833a35ad6c29a57f659607afb27eebdc2ea5 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 10 Apr 2008 17:52:52 -0400 Subject: R3xx+: consolidate more tcl code --- src/radeon_commonfuncs.c | 22 +++++++++++++++++----- src/radeon_exa_render.c | 24 +++--------------------- src/radeon_textured_videofuncs.c | 22 ++++------------------ 3 files changed, 24 insertions(+), 44 deletions(-) diff --git a/src/radeon_commonfuncs.c b/src/radeon_commonfuncs.c index 69b35361..5bc502c6 100644 --- a/src/radeon_commonfuncs.c +++ b/src/radeon_commonfuncs.c @@ -145,12 +145,14 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) FINISH_ACCEL(); /* setup the VAP */ - BEGIN_ACCEL(5); - if (info->has_tcl) + + if (info->has_tcl) { + BEGIN_ACCEL(11); OUT_ACCEL_REG(R300_VAP_CNTL_STATUS, 0); - else + } else { + BEGIN_ACCEL(5); OUT_ACCEL_REG(R300_VAP_CNTL_STATUS, R300_PVS_BYPASS); - + } OUT_ACCEL_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); OUT_ACCEL_REG(R300_VAP_CNTL, ((6 << R300_PVS_NUM_SLOTS_SHIFT) | (5 << R300_PVS_NUM_CNTLRS_SHIFT) | @@ -158,6 +160,15 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) (12 << R300_VF_MAX_VTX_NUM_SHIFT))); OUT_ACCEL_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT); OUT_ACCEL_REG(R300_VAP_PSC_SGN_NORM_CNTL, 0); + + if (info->has_tcl) { + OUT_ACCEL_REG(R300_VAP_PVS_FLOW_CNTL_OPC, 0); + OUT_ACCEL_REG(R300_VAP_GB_VERT_CLIP_ADJ, 0x3f800000); + OUT_ACCEL_REG(R300_VAP_GB_VERT_DISC_ADJ, 0x3f800000); + OUT_ACCEL_REG(R300_VAP_GB_HORZ_CLIP_ADJ, 0x3f800000); + OUT_ACCEL_REG(R300_VAP_GB_HORZ_DISC_ADJ, 0x3f800000); + OUT_ACCEL_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE); + } FINISH_ACCEL(); BEGIN_ACCEL(4); @@ -186,7 +197,8 @@ static void FUNC_NAME(RADEONInit3DEngine)(ScrnInfoPtr pScrn) OUT_ACCEL_REG(R300_FG_ALPHA_FUNC, 0); FINISH_ACCEL(); - BEGIN_ACCEL(12); + BEGIN_ACCEL(13); + OUT_ACCEL_REG(R300_RB3D_ABLENDCNTL, 0); OUT_ACCEL_REG(R300_RB3D_ZSTENCILCNTL, 0); OUT_ACCEL_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE); OUT_ACCEL_REG(R300_RB3D_BW_CNTL, 0); diff --git a/src/radeon_exa_render.c b/src/radeon_exa_render.c index fab8f97e..b806399f 100644 --- a/src/radeon_exa_render.c +++ b/src/radeon_exa_render.c @@ -1051,10 +1051,6 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, CARD32 txenable, colorpitch; CARD32 blendcntl; int pixel_shift; - /*int has_tcl = ((info->ChipFamily != CHIP_FAMILY_RS690) && - (info->ChipFamily != CHIP_FAMILY_RS740) && - (info->ChipFamily != CHIP_FAMILY_RS400) && - (info->ChipFamily != CHIP_FAMILY_RV515));*/ ACCEL_PREAMBLE(); TRACE; @@ -1175,10 +1171,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, /* setup the vertex shader */ if (info->has_tcl) { if (pMask) { - BEGIN_ACCEL(22); - /* flush the PVS before updating??? */ - OUT_ACCEL_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); - + BEGIN_ACCEL(15); OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0, ((0 << R300_PVS_FIRST_INST_SHIFT) | (2 << R300_PVS_XYZW_VALID_INST_SHIFT) | @@ -1186,10 +1179,7 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_1, (2 << R300_PVS_LAST_VTX_SRC_INST_SHIFT)); } else { - BEGIN_ACCEL(18); - /* flush the PVS before updating??? */ - OUT_ACCEL_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0); - + BEGIN_ACCEL(11); OUT_ACCEL_REG(R300_VAP_PVS_CODE_CNTL_0, ((0 << R300_PVS_FIRST_INST_SHIFT) | (1 << R300_PVS_XYZW_VALID_INST_SHIFT) | @@ -1287,13 +1277,6 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0))); } - OUT_ACCEL_REG(R300_VAP_PVS_FLOW_CNTL_OPC, 0); - - OUT_ACCEL_REG(R300_VAP_GB_VERT_CLIP_ADJ, 0x3f800000); - OUT_ACCEL_REG(R300_VAP_GB_VERT_DISC_ADJ, 0x3f800000); - OUT_ACCEL_REG(R300_VAP_GB_HORZ_CLIP_ADJ, 0x3f800000); - OUT_ACCEL_REG(R300_VAP_GB_HORZ_DISC_ADJ, 0x3f800000); - OUT_ACCEL_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE); FINISH_ACCEL(); } @@ -1871,14 +1854,13 @@ static Bool FUNC_NAME(R300PrepareComposite)(int op, PicturePtr pSrcPicture, FINISH_ACCEL(); } - BEGIN_ACCEL(4); + BEGIN_ACCEL(3); OUT_ACCEL_REG(R300_RB3D_COLOROFFSET0, dst_offset); OUT_ACCEL_REG(R300_RB3D_COLORPITCH0, colorpitch); blendcntl = RADEONGetBlendCntl(op, pMaskPicture, pDstPicture->format); OUT_ACCEL_REG(R300_RB3D_BLENDCNTL, blendcntl | R300_ALPHA_BLEND_ENABLE | R300_READ_ENABLE); - OUT_ACCEL_REG(R300_RB3D_ABLENDCNTL, 0); FINISH_ACCEL(); diff --git a/src/radeon_textured_videofuncs.c b/src/radeon_textured_videofuncs.c index 90f01e81..363490a2 100644 --- a/src/radeon_textured_videofuncs.c +++ b/src/radeon_textured_videofuncs.c @@ -122,10 +122,6 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv if (IS_R300_3D || IS_R500_3D) { CARD32 output_fmt; - /*int has_tcl = ((info->ChipFamily != CHIP_FAMILY_RS690) && - (info->ChipFamily != CHIP_FAMILY_RS740) && - (info->ChipFamily != CHIP_FAMILY_RS400) && - (info->ChipFamily != CHIP_FAMILY_RV515));*/ switch (pPixmap->drawable.bitsPerPixel) { case 16: @@ -196,12 +192,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv txenable = R300_TEX_0_ENABLE; /* setup the VAP */ - if (info->has_tcl) - BEGIN_VIDEO(22); - else - BEGIN_VIDEO(5); - if (info->has_tcl) { + BEGIN_VIDEO(16); OUT_VIDEO_REG(R300_VAP_PROG_STREAM_CNTL_0, ((R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_0_SHIFT) | (0 << R300_SKIP_DWORDS_0_SHIFT) | @@ -226,6 +218,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv ((R300_WRITE_ENA_X | R300_WRITE_ENA_Y | R300_WRITE_ENA_Z | R300_WRITE_ENA_W) << R300_WRITE_ENA_1_SHIFT))); } else { + BEGIN_VIDEO(5); OUT_VIDEO_REG(R300_VAP_PROG_STREAM_CNTL_0, ((R300_DATA_TYPE_FLOAT_2 << R300_DATA_TYPE_0_SHIFT) | (0 << R300_SKIP_DWORDS_0_SHIFT) | @@ -317,13 +310,6 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv R300_PVS_SRC_SWIZZLE_Z(R300_PVS_SRC_SELECT_FORCE_0) | R300_PVS_SRC_SWIZZLE_W(R300_PVS_SRC_SELECT_FORCE_0))); - OUT_VIDEO_REG(R300_VAP_PVS_FLOW_CNTL_OPC, 0); - - OUT_VIDEO_REG(R300_VAP_GB_VERT_CLIP_ADJ, 0x3f800000); - OUT_VIDEO_REG(R300_VAP_GB_VERT_DISC_ADJ, 0x3f800000); - OUT_VIDEO_REG(R300_VAP_GB_HORZ_CLIP_ADJ, 0x3f800000); - OUT_VIDEO_REG(R300_VAP_GB_HORZ_DISC_ADJ, 0x3f800000); - OUT_VIDEO_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE); } OUT_VIDEO_REG(R300_VAP_OUT_VTX_FMT_0, R300_VTX_POS_PRESENT); @@ -523,7 +509,7 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv FINISH_VIDEO(); } - BEGIN_VIDEO(6); + BEGIN_VIDEO(5); OUT_VIDEO_REG(R300_TX_INVALTAGS, 0); OUT_VIDEO_REG(R300_TX_ENABLE, txenable); @@ -531,8 +517,8 @@ FUNC_NAME(RADEONDisplayTexturedVideo)(ScrnInfoPtr pScrn, RADEONPortPrivPtr pPriv OUT_VIDEO_REG(R300_RB3D_COLORPITCH0, colorpitch); blendcntl = RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO; + /* no need to enable blending */ OUT_VIDEO_REG(R300_RB3D_BLENDCNTL, blendcntl); - OUT_VIDEO_REG(R300_RB3D_ABLENDCNTL, 0); FINISH_VIDEO(); BEGIN_VIDEO(1); -- cgit v1.2.3