From e7b26abc3c20fb53bf2cd02404ac5e0654fee18d Mon Sep 17 00:00:00 2001 From: Matthias Hopf Date: Tue, 15 Dec 2009 10:53:48 -0500 Subject: fix 200M freezes on VT switch if CRTC is disabled It appears that RS4xx chips need to have the crtc enabled when the timing is programmed. agd5f: minor fixes/cleanup of the original patch --- src/legacy_crtc.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/src/legacy_crtc.c b/src/legacy_crtc.c index aee3d15a..ba3b1022 100644 --- a/src/legacy_crtc.c +++ b/src/legacy_crtc.c @@ -912,6 +912,11 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, ? RADEON_CRTC_INTERLACE_EN : 0)); + /* 200M freezes on VT switch sometimes if CRTC is disabled */ + if ((info->ChipFamily == CHIP_FAMILY_RS400) || + (info->ChipFamily == CHIP_FAMILY_RS480)) + save->crtc_gen_cntl |= RADEON_CRTC_EN; + save->crtc_ext_cntl |= (RADEON_XCRT_CNT_EN| RADEON_CRTC_VSYNC_DIS | RADEON_CRTC_HSYNC_DIS | @@ -1162,6 +1167,11 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save, ? RADEON_CRTC2_INTERLACE_EN : 0)); + /* 200M freezes on VT switch sometimes if CRTC is disabled */ + if ((info->ChipFamily == CHIP_FAMILY_RS400) || + (info->ChipFamily == CHIP_FAMILY_RS480)) + save->crtc2_gen_cntl |= RADEON_CRTC2_EN; + save->disp2_merge_cntl = info->SavedReg->disp2_merge_cntl; save->disp2_merge_cntl &= ~(RADEON_DISP2_RGB_OFFSET_EN); -- cgit v1.2.3