From 78a3eabff382e8ebe33df2039076fb083bcc361b Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Sun, 4 Nov 2007 14:11:26 -0500 Subject: WIP: get ATOM crtc stuff working on r4xx --- src/radeon_crtc.c | 67 ++++++++++++++++++++++++++++++++++++++++++++++++------- 1 file changed, 59 insertions(+), 8 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index de242730..55307136 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -54,7 +54,13 @@ #endif void radeon_crtc_load_lut(xf86CrtcPtr crtc); - +#if 0 +extern void atombios_crtc_mode_set(xf86CrtcPtr crtc, + DisplayModePtr mode, + DisplayModePtr adjusted_mode, + int x, int y); +extern void atombios_crtc_dpms(xf86CrtcPtr crtc, int mode); +#endif static void radeon_crtc_dpms(xf86CrtcPtr crtc, int mode) { @@ -63,7 +69,14 @@ radeon_crtc_dpms(xf86CrtcPtr crtc, int mode) RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; - + +#if 1 + if (info->IsAtomBios) { + atombios_crtc_dpms(crtc, mode); + //return; + } +#endif + mask = radeon_crtc->crtc_id ? (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B) : (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS); @@ -116,7 +129,15 @@ radeon_crtc_mode_fixup(xf86CrtcPtr crtc, DisplayModePtr mode, static void radeon_crtc_mode_prepare(xf86CrtcPtr crtc) { - radeon_crtc_dpms(crtc, DPMSModeOff); + ScrnInfoPtr pScrn = crtc->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); + +#if 1 + if (info->IsAtomBios) + atombios_crtc_dpms(crtc, DPMSModeOff); + else +#endif + radeon_crtc_dpms(crtc, DPMSModeOff); } /* Define common registers for requested video mode */ @@ -168,7 +189,7 @@ RADEONInitSurfaceCntl(xf86CrtcPtr crtc, RADEONSavePtr save) } -static Bool +Bool RADEONInitCrtcBase(xf86CrtcPtr crtc, RADEONSavePtr save, int x, int y) { @@ -286,7 +307,7 @@ RADEONInitCrtcBase(xf86CrtcPtr crtc, RADEONSavePtr save, } /* Define CRTC registers for requested video mode */ -static Bool +Bool RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, DisplayModePtr mode) { @@ -399,7 +420,7 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, return TRUE; } -static Bool +Bool RADEONInitCrtc2Base(xf86CrtcPtr crtc, RADEONSavePtr save, int x, int y) { @@ -512,7 +533,7 @@ RADEONInitCrtc2Base(xf86CrtcPtr crtc, RADEONSavePtr save, } /* Define CRTC2 registers for requested video mode */ -static Bool +Bool RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save, DisplayModePtr mode) { @@ -812,6 +833,13 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, #endif } +#if 0 + if (info->IsAtomBios) { + atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y); + return; + } +#endif + for (i = 0; i < xf86_config->num_output; i++) { xf86OutputPtr output = xf86_config->output[i]; RADEONOutputPrivatePtr radeon_output = output->driver_private; @@ -888,6 +916,14 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, ErrorF("restore common\n"); RADEONRestoreCommonRegisters(pScrn, &info->ModeReg); +#if 1 + if (info->IsAtomBios) { + //RADEONRestoreCrtcRegisters(pScrn, &info->ModeReg); + atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y); + return; + } +#endif + switch (radeon_crtc->crtc_id) { case 0: ErrorF("restore crtc1\n"); @@ -924,12 +960,27 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, /* reset ecp_div for Xv */ info->ecp_div = -1; +#if 0 + if (info->IsAtomBios) { + atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y); + //return; + } +#endif + } static void radeon_crtc_mode_commit(xf86CrtcPtr crtc) { - radeon_crtc_dpms(crtc, DPMSModeOn); + ScrnInfoPtr pScrn = crtc->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); + +#if 1 + if (info->IsAtomBios) + atombios_crtc_dpms(crtc, DPMSModeOn); + //else +#endif + radeon_crtc_dpms(crtc, DPMSModeOn); } void radeon_crtc_load_lut(xf86CrtcPtr crtc) -- cgit v1.2.3 From 20f01950e42babc308b4470df6a3c6628c932003 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 6 Nov 2007 18:04:43 -0500 Subject: for r4xx ATOM cards, just use ATOM for PLL while crtc timing and pll seem to work fine, output setup and routing don't seem to work too reliably with atom. AMD claims ATOM was still pretty new with r4xx so it's probably better to stick with direct programming for some things. --- src/radeon_crtc.c | 43 ++++++++++++------------------------------- 1 file changed, 12 insertions(+), 31 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 55307136..4a017c04 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -70,10 +70,10 @@ radeon_crtc_dpms(xf86CrtcPtr crtc, int mode) RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; -#if 1 +#if 0 if (info->IsAtomBios) { atombios_crtc_dpms(crtc, mode); - //return; + return; } #endif @@ -132,12 +132,7 @@ radeon_crtc_mode_prepare(xf86CrtcPtr crtc) ScrnInfoPtr pScrn = crtc->scrn; RADEONInfoPtr info = RADEONPTR(pScrn); -#if 1 - if (info->IsAtomBios) - atombios_crtc_dpms(crtc, DPMSModeOff); - else -#endif - radeon_crtc_dpms(crtc, DPMSModeOff); + radeon_crtc_dpms(crtc, DPMSModeOff); } /* Define common registers for requested video mode */ @@ -916,26 +911,24 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, ErrorF("restore common\n"); RADEONRestoreCommonRegisters(pScrn, &info->ModeReg); -#if 1 - if (info->IsAtomBios) { - //RADEONRestoreCrtcRegisters(pScrn, &info->ModeReg); - atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y); - return; - } -#endif - switch (radeon_crtc->crtc_id) { case 0: ErrorF("restore crtc1\n"); RADEONRestoreCrtcRegisters(pScrn, &info->ModeReg); ErrorF("restore pll1\n"); - RADEONRestorePLLRegisters(pScrn, &info->ModeReg); + if (info->IsAtomBios) + atombios_crtc_set_pll(crtc, adjusted_mode); + else + RADEONRestorePLLRegisters(pScrn, &info->ModeReg); break; case 1: ErrorF("restore crtc2\n"); RADEONRestoreCrtc2Registers(pScrn, &info->ModeReg); ErrorF("restore pll2\n"); - RADEONRestorePLL2Registers(pScrn, &info->ModeReg); + if (info->IsAtomBios) + atombios_crtc_set_pll(crtc, adjusted_mode); + else + RADEONRestorePLL2Registers(pScrn, &info->ModeReg); break; } @@ -960,13 +953,6 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, /* reset ecp_div for Xv */ info->ecp_div = -1; -#if 0 - if (info->IsAtomBios) { - atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y); - //return; - } -#endif - } static void @@ -975,12 +961,7 @@ radeon_crtc_mode_commit(xf86CrtcPtr crtc) ScrnInfoPtr pScrn = crtc->scrn; RADEONInfoPtr info = RADEONPTR(pScrn); -#if 1 - if (info->IsAtomBios) - atombios_crtc_dpms(crtc, DPMSModeOn); - //else -#endif - radeon_crtc_dpms(crtc, DPMSModeOn); + radeon_crtc_dpms(crtc, DPMSModeOn); } void radeon_crtc_load_lut(xf86CrtcPtr crtc) -- cgit v1.2.3 From 0d3e0735f710cb7b9505e4330997aa332f73c102 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 6 Nov 2007 22:59:25 -0500 Subject: First round of avivo support --- src/radeon_crtc.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 4a017c04..64e03e1b 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -1252,6 +1252,7 @@ Bool RADEONAllocateControllers(ScrnInfoPtr pScrn) pRADEONEnt->pCrtc[0]->driver_private = pRADEONEnt->Controller[0]; pRADEONEnt->Controller[0]->crtc_id = 0; + pRADEONEnt->Controller[0]->crtc_offset = 0; if (!pRADEONEnt->HasCRTC2) return TRUE; @@ -1269,6 +1270,7 @@ Bool RADEONAllocateControllers(ScrnInfoPtr pScrn) pRADEONEnt->pCrtc[1]->driver_private = pRADEONEnt->Controller[1]; pRADEONEnt->Controller[1]->crtc_id = 1; + pRADEONEnt->Controller[0]->crtc_offset = AVIVO_CRTC2_H_TOTAL - AVIVO_CRTC1_H_TOTAL; return TRUE; } -- cgit v1.2.3 From 68e7f5c67e2e9d2162b469ce31f452f3f89756b5 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 6 Nov 2007 23:43:29 -0500 Subject: more avivo updates --- src/radeon_crtc.c | 44 +++++++++++++++++++++++++++----------------- 1 file changed, 27 insertions(+), 17 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 64e03e1b..397942ae 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -54,13 +54,13 @@ #endif void radeon_crtc_load_lut(xf86CrtcPtr crtc); -#if 0 + extern void atombios_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr adjusted_mode, int x, int y); extern void atombios_crtc_dpms(xf86CrtcPtr crtc, int mode); -#endif + static void radeon_crtc_dpms(xf86CrtcPtr crtc, int mode) { @@ -70,12 +70,10 @@ radeon_crtc_dpms(xf86CrtcPtr crtc, int mode) RADEONInfoPtr info = RADEONPTR(pScrn); unsigned char *RADEONMMIO = info->MMIO; -#if 0 - if (info->IsAtomBios) { + if (IS_AVIVO_VARIANT) { atombios_crtc_dpms(crtc, mode); return; } -#endif mask = radeon_crtc->crtc_id ? (RADEON_CRTC2_DISP_DIS | RADEON_CRTC2_VSYNC_DIS | RADEON_CRTC2_HSYNC_DIS | RADEON_CRTC2_DISP_REQ_EN_B) : (RADEON_CRTC_DISPLAY_DIS | RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_VSYNC_DIS); @@ -799,7 +797,7 @@ radeon_update_tv_routing(ScrnInfoPtr pScrn, RADEONSavePtr restore) } static void -radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, +legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, DisplayModePtr adjusted_mode, int x, int y) { ScrnInfoPtr pScrn = crtc->scrn; @@ -828,13 +826,6 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, #endif } -#if 0 - if (info->IsAtomBios) { - atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y); - return; - } -#endif - for (i = 0; i < xf86_config->num_output; i++) { xf86OutputPtr output = xf86_config->output[i]; RADEONOutputPrivatePtr radeon_output = output->driver_private; @@ -916,18 +907,18 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, ErrorF("restore crtc1\n"); RADEONRestoreCrtcRegisters(pScrn, &info->ModeReg); ErrorF("restore pll1\n"); - if (info->IsAtomBios) + /*if (info->IsAtomBios) atombios_crtc_set_pll(crtc, adjusted_mode); - else + else*/ RADEONRestorePLLRegisters(pScrn, &info->ModeReg); break; case 1: ErrorF("restore crtc2\n"); RADEONRestoreCrtc2Registers(pScrn, &info->ModeReg); ErrorF("restore pll2\n"); - if (info->IsAtomBios) + /*if (info->IsAtomBios) atombios_crtc_set_pll(crtc, adjusted_mode); - else + else*/ RADEONRestorePLL2Registers(pScrn, &info->ModeReg); break; } @@ -955,6 +946,20 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, } +static void +radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, + DisplayModePtr adjusted_mode, int x, int y) +{ + ScrnInfoPtr pScrn = crtc->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); + + if (IS_AVIVO_VARIANT) { + atombios_crtc_mode_set(crtc, mode, adjusted_mode, x, y); + } else { + legacy_crtc_mode_set(crtc, mode, adjusted_mode, x, y); + } +} + static void radeon_crtc_mode_commit(xf86CrtcPtr crtc) { @@ -990,8 +995,13 @@ radeon_crtc_gamma_set(xf86CrtcPtr crtc, CARD16 *red, CARD16 *green, { RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; ScrnInfoPtr pScrn = crtc->scrn; + RADEONInfoPtr info = RADEONPTR(pScrn); int i, j; + // fix me + if (IS_AVIVO_VARIANT) + return; + if (pScrn->depth == 16) { for (i = 0; i < 64; i++) { if (i <= 31) { -- cgit v1.2.3 From 8078c299d5941460243944d55051547c1a4d3791 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Fri, 9 Nov 2007 16:35:08 -0500 Subject: use atom to program plls on r4xx --- src/radeon_crtc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 397942ae..a437f978 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -907,18 +907,18 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, ErrorF("restore crtc1\n"); RADEONRestoreCrtcRegisters(pScrn, &info->ModeReg); ErrorF("restore pll1\n"); - /*if (info->IsAtomBios) + if (info->IsAtomBios) atombios_crtc_set_pll(crtc, adjusted_mode); - else*/ + else RADEONRestorePLLRegisters(pScrn, &info->ModeReg); break; case 1: ErrorF("restore crtc2\n"); RADEONRestoreCrtc2Registers(pScrn, &info->ModeReg); ErrorF("restore pll2\n"); - /*if (info->IsAtomBios) + if (info->IsAtomBios) atombios_crtc_set_pll(crtc, adjusted_mode); - else*/ + else RADEONRestorePLL2Registers(pScrn, &info->ModeReg); break; } -- cgit v1.2.3 From efac14e669a0c6184f8848191eb49ffb21934ee1 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 15 Nov 2007 23:17:25 -0500 Subject: r5xx: fix typo for crtc offset --- src/radeon_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index a437f978..64f8037e 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -1280,7 +1280,7 @@ Bool RADEONAllocateControllers(ScrnInfoPtr pScrn) pRADEONEnt->pCrtc[1]->driver_private = pRADEONEnt->Controller[1]; pRADEONEnt->Controller[1]->crtc_id = 1; - pRADEONEnt->Controller[0]->crtc_offset = AVIVO_CRTC2_H_TOTAL - AVIVO_CRTC1_H_TOTAL; + pRADEONEnt->Controller[1]->crtc_offset = AVIVO_CRTC2_H_TOTAL - AVIVO_CRTC1_H_TOTAL; return TRUE; } -- cgit v1.2.3 From d39eb2077c6b2fc094ccd952772528eb9428c587 Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 16 Nov 2007 15:00:50 +1000 Subject: radeon: rename a large section of avivo regs to documented names --- src/radeon_crtc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 64f8037e..9192a9e4 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -1280,7 +1280,8 @@ Bool RADEONAllocateControllers(ScrnInfoPtr pScrn) pRADEONEnt->pCrtc[1]->driver_private = pRADEONEnt->Controller[1]; pRADEONEnt->Controller[1]->crtc_id = 1; - pRADEONEnt->Controller[1]->crtc_offset = AVIVO_CRTC2_H_TOTAL - AVIVO_CRTC1_H_TOTAL; + pRADEONEnt->Controller[1]->crtc_offset = AVIVO_D2CRTC_H_TOTAL - AVIVO_D1CRTC_H_TOTAL; + return TRUE; } -- cgit v1.2.3 From 017c939cf0a2b12fbdc1681cc70c28b23ae3b397 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 29 Nov 2007 02:52:14 -0500 Subject: RADEON: implement CLUT adjust support --- src/radeon_crtc.c | 22 +++++++++++++++++----- 1 file changed, 17 insertions(+), 5 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 9192a9e4..c4a5d116 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -980,8 +980,25 @@ void radeon_crtc_load_lut(xf86CrtcPtr crtc) if (!crtc->enabled) return; + if (IS_AVIVO_VARIANT) { + OUTREG(AVIVO_DC_LUTA_CONTROL + radeon_crtc->crtc_offset, 0); + + OUTREG(AVIVO_DC_LUTA_BLACK_OFFSET_BLUE + radeon_crtc->crtc_offset, 0); + OUTREG(AVIVO_DC_LUTA_BLACK_OFFSET_GREEN + radeon_crtc->crtc_offset, 0); + OUTREG(AVIVO_DC_LUTA_BLACK_OFFSET_RED + radeon_crtc->crtc_offset, 0); + + OUTREG(AVIVO_DC_LUTA_WHITE_OFFSET_BLUE + radeon_crtc->crtc_offset, 0x0000ffff); + OUTREG(AVIVO_DC_LUTA_WHITE_OFFSET_GREEN + radeon_crtc->crtc_offset, 0x0000ffff); + OUTREG(AVIVO_DC_LUTA_WHITE_OFFSET_RED + radeon_crtc->crtc_offset, 0x0000ffff); + } + PAL_SELECT(radeon_crtc->crtc_id); + if (IS_AVIVO_VARIANT) { + OUTREG(AVIVO_DC_LUT_RW_MODE, 0); + OUTREG(AVIVO_DC_LUT_WRITE_EN_MASK, 0x0000003f); + } + for (i = 0; i < 256; i++) { OUTPAL(i, radeon_crtc->lut_r[i], radeon_crtc->lut_g[i], radeon_crtc->lut_b[i]); } @@ -995,13 +1012,8 @@ radeon_crtc_gamma_set(xf86CrtcPtr crtc, CARD16 *red, CARD16 *green, { RADEONCrtcPrivatePtr radeon_crtc = crtc->driver_private; ScrnInfoPtr pScrn = crtc->scrn; - RADEONInfoPtr info = RADEONPTR(pScrn); int i, j; - // fix me - if (IS_AVIVO_VARIANT) - return; - if (pScrn->depth == 16) { for (i = 0; i < 64; i++) { if (i <= 31) { -- cgit v1.2.3 From b368b0f22cd1d7ef9b4c65d82929c76f3b82d573 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Fri, 30 Nov 2007 14:29:27 -0500 Subject: RADEON: disable atom pll set for r4xx cards the clocks do not get set correctly in all cases. this needs further investigation. --- src/radeon_crtc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index c4a5d116..57fad399 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -907,18 +907,18 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, ErrorF("restore crtc1\n"); RADEONRestoreCrtcRegisters(pScrn, &info->ModeReg); ErrorF("restore pll1\n"); - if (info->IsAtomBios) + /*if (info->IsAtomBios) atombios_crtc_set_pll(crtc, adjusted_mode); - else + else*/ RADEONRestorePLLRegisters(pScrn, &info->ModeReg); break; case 1: ErrorF("restore crtc2\n"); RADEONRestoreCrtc2Registers(pScrn, &info->ModeReg); ErrorF("restore pll2\n"); - if (info->IsAtomBios) + /*if (info->IsAtomBios) atombios_crtc_set_pll(crtc, adjusted_mode); - else + else*/ RADEONRestorePLL2Registers(pScrn, &info->ModeReg); break; } -- cgit v1.2.3 From bb5ede557bf32a42eef158ff0fbcfe1c6ede098a Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 7 Dec 2007 14:30:32 +1000 Subject: radeon: move savedreg/modereg into entity instead of info --- src/radeon_crtc.c | 72 +++++++++++++++++++++++++++---------------------------- 1 file changed, 36 insertions(+), 36 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index b1d216de..718073c0 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -311,7 +311,7 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, return FALSE; } - /*save->bios_4_scratch = info->SavedReg.bios_4_scratch;*/ + /*save->bios_4_scratch = info->SavedReg->bios_4_scratch;*/ save->crtc_gen_cntl = (RADEON_CRTC_EXT_DISP_EN | RADEON_CRTC_EN | (format << 8) @@ -330,7 +330,7 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, RADEON_CRTC_HSYNC_DIS | RADEON_CRTC_DISPLAY_DIS); - save->disp_merge_cntl = info->SavedReg.disp_merge_cntl; + save->disp_merge_cntl = info->SavedReg->disp_merge_cntl; save->disp_merge_cntl &= ~RADEON_DISP_RGB_OFFSET_EN; save->crtc_more_cntl = 0; @@ -380,10 +380,10 @@ RADEONInitCrtcRegisters(xf86CrtcPtr crtc, RADEONSavePtr save, save->fp_crtc_v_total_disp = save->crtc_v_total_disp; if (info->IsDellServer) { - save->dac2_cntl = info->SavedReg.dac2_cntl; - save->tv_dac_cntl = info->SavedReg.tv_dac_cntl; - save->crtc2_gen_cntl = info->SavedReg.crtc2_gen_cntl; - save->disp_hw_debug = info->SavedReg.disp_hw_debug; + save->dac2_cntl = info->SavedReg->dac2_cntl; + save->tv_dac_cntl = info->SavedReg->tv_dac_cntl; + save->crtc2_gen_cntl = info->SavedReg->crtc2_gen_cntl; + save->disp_hw_debug = info->SavedReg->disp_hw_debug; save->dac2_cntl &= ~RADEON_DAC2_DAC_CLK_SEL; save->dac2_cntl |= RADEON_DAC2_DAC2_CLK_SEL; @@ -589,7 +589,7 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save, ? RADEON_CRTC2_INTERLACE_EN : 0)); - save->disp2_merge_cntl = info->SavedReg.disp2_merge_cntl; + save->disp2_merge_cntl = info->SavedReg->disp2_merge_cntl; save->disp2_merge_cntl &= ~(RADEON_DISP2_RGB_OFFSET_EN); save->fp_h2_sync_strt_wid = save->crtc2_h_sync_strt_wid; @@ -687,7 +687,7 @@ RADEONInitPLLRegisters(ScrnInfoPtr pScrn, RADEONInfoPtr info, save->htotal_cntl = 0; - save->vclk_ecp_cntl = (info->SavedReg.vclk_ecp_cntl & + save->vclk_ecp_cntl = (info->SavedReg->vclk_ecp_cntl & ~RADEON_VCLK_SRC_SEL_MASK) | RADEON_VCLK_SRC_SEL_PPLLCLK; } @@ -757,7 +757,7 @@ RADEONInitPLL2Registers(ScrnInfoPtr pScrn, RADEONSavePtr save, (post_div->bitvalue << 16)); save->htotal_cntl2 = 0; - save->pixclks_cntl = ((info->SavedReg.pixclks_cntl & + save->pixclks_cntl = ((info->SavedReg->pixclks_cntl & ~(RADEON_PIX2CLK_SRC_SEL_MASK)) | RADEON_PIX2CLK_SRC_SEL_P2PLLCLK); @@ -770,8 +770,8 @@ RADEONInitBIOSRegisters(ScrnInfoPtr pScrn, RADEONSavePtr save) /* tell the bios not to muck with the hardware on events */ save->bios_4_scratch = 0x4; /* 0x4 needed for backlight */ - save->bios_5_scratch = (info->SavedReg.bios_5_scratch & 0xff) | 0xff00; /* bits 0-3 keep backlight level */ - save->bios_6_scratch = info->SavedReg.bios_6_scratch | 0x40000000; + save->bios_5_scratch = (info->SavedReg->bios_5_scratch & 0xff) | 0xff00; /* bits 0-3 keep backlight level */ + save->bios_6_scratch = info->SavedReg->bios_6_scratch | 0x40000000; } @@ -823,38 +823,38 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, } if (info->IsMobility) - RADEONInitBIOSRegisters(pScrn, &info->ModeReg); + RADEONInitBIOSRegisters(pScrn, info->ModeReg); ErrorF("init memmap\n"); - RADEONInitMemMapRegisters(pScrn, &info->ModeReg, info); + RADEONInitMemMapRegisters(pScrn, info->ModeReg, info); ErrorF("init common\n"); - RADEONInitCommonRegisters(&info->ModeReg, info); + RADEONInitCommonRegisters(info->ModeReg, info); - RADEONInitSurfaceCntl(crtc, &info->ModeReg); + RADEONInitSurfaceCntl(crtc, info->ModeReg); switch (radeon_crtc->crtc_id) { case 0: ErrorF("init crtc1\n"); - RADEONInitCrtcRegisters(crtc, &info->ModeReg, adjusted_mode); - RADEONInitCrtcBase(crtc, &info->ModeReg, x, y); + RADEONInitCrtcRegisters(crtc, info->ModeReg, adjusted_mode); + RADEONInitCrtcBase(crtc, info->ModeReg, x, y); dot_clock = adjusted_mode->Clock / 1000.0; if (dot_clock) { ErrorF("init pll1\n"); - RADEONInitPLLRegisters(pScrn, info, &info->ModeReg, &info->pll, dot_clock); + RADEONInitPLLRegisters(pScrn, info, info->ModeReg, &info->pll, dot_clock); } else { - info->ModeReg.ppll_ref_div = info->SavedReg.ppll_ref_div; - info->ModeReg.ppll_div_3 = info->SavedReg.ppll_div_3; - info->ModeReg.htotal_cntl = info->SavedReg.htotal_cntl; + info->ModeReg->ppll_ref_div = info->SavedReg->ppll_ref_div; + info->ModeReg->ppll_div_3 = info->SavedReg->ppll_div_3; + info->ModeReg->htotal_cntl = info->SavedReg->htotal_cntl; } break; case 1: ErrorF("init crtc2\n"); - RADEONInitCrtc2Registers(crtc, &info->ModeReg, adjusted_mode); - RADEONInitCrtc2Base(crtc, &info->ModeReg, x, y); + RADEONInitCrtc2Registers(crtc, info->ModeReg, adjusted_mode); + RADEONInitCrtc2Base(crtc, info->ModeReg, x, y); dot_clock = adjusted_mode->Clock / 1000.0; if (dot_clock) { ErrorF("init pll2\n"); - RADEONInitPLL2Registers(pScrn, &info->ModeReg, &info->pll, dot_clock, no_odd_post_div); + RADEONInitPLL2Registers(pScrn, info->ModeReg, &info->pll, dot_clock, no_odd_post_div); } break; } @@ -867,13 +867,13 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, if (radeon_output->MonType == MT_STV || radeon_output->MonType == MT_CTV) { switch (radeon_crtc->crtc_id) { case 0: - RADEONAdjustCrtcRegistersForTV(pScrn, &info->ModeReg, adjusted_mode, output); - RADEONAdjustPLLRegistersForTV(pScrn, &info->ModeReg, adjusted_mode, output); + RADEONAdjustCrtcRegistersForTV(pScrn, info->ModeReg, adjusted_mode, output); + RADEONAdjustPLLRegistersForTV(pScrn, info->ModeReg, adjusted_mode, output); update_tv_routing = TRUE; break; case 1: - RADEONAdjustCrtc2RegistersForTV(pScrn, &info->ModeReg, adjusted_mode, output); - RADEONAdjustPLL2RegistersForTV(pScrn, &info->ModeReg, adjusted_mode, output); + RADEONAdjustCrtc2RegistersForTV(pScrn, info->ModeReg, adjusted_mode, output); + RADEONAdjustPLL2RegistersForTV(pScrn, info->ModeReg, adjusted_mode, output); break; } } @@ -881,31 +881,31 @@ radeon_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, } if (info->IsMobility) - RADEONRestoreBIOSRegisters(pScrn, &info->ModeReg); + RADEONRestoreBIOSRegisters(pScrn, info->ModeReg); ErrorF("restore memmap\n"); - RADEONRestoreMemMapRegisters(pScrn, &info->ModeReg); + RADEONRestoreMemMapRegisters(pScrn, info->ModeReg); ErrorF("restore common\n"); - RADEONRestoreCommonRegisters(pScrn, &info->ModeReg); + RADEONRestoreCommonRegisters(pScrn, info->ModeReg); switch (radeon_crtc->crtc_id) { case 0: ErrorF("restore crtc1\n"); - RADEONRestoreCrtcRegisters(pScrn, &info->ModeReg); + RADEONRestoreCrtcRegisters(pScrn, info->ModeReg); ErrorF("restore pll1\n"); - RADEONRestorePLLRegisters(pScrn, &info->ModeReg); + RADEONRestorePLLRegisters(pScrn, info->ModeReg); break; case 1: ErrorF("restore crtc2\n"); - RADEONRestoreCrtc2Registers(pScrn, &info->ModeReg); + RADEONRestoreCrtc2Registers(pScrn, info->ModeReg); ErrorF("restore pll2\n"); - RADEONRestorePLL2Registers(pScrn, &info->ModeReg); + RADEONRestorePLL2Registers(pScrn, info->ModeReg); break; } /* pixclks_cntl handles tv-out clock routing */ if (update_tv_routing) - radeon_update_tv_routing(pScrn, &info->ModeReg); + radeon_update_tv_routing(pScrn, info->ModeReg); if (info->DispPriority) RADEONInitDispBandwidth(pScrn); -- cgit v1.2.3 From 0dcd926d3092100854b3e362d6659d4950508aeb Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Fri, 7 Dec 2007 14:45:04 +1000 Subject: radeon: bring back zaphod all is forgiven. You've whined, you've cried, you've nagged, and you're guilt trippin has made me do it... It actually wasn't as hard as I thought it would be. Still not perfect, couple of things to fix yet --- src/radeon_crtc.c | 55 ++++++++++++++++++++++++++++++------------------------- 1 file changed, 30 insertions(+), 25 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 718073c0..f28bdf7e 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -1203,40 +1203,45 @@ static const xf86CrtcFuncsRec radeon_crtc_funcs = { .destroy = NULL, /* XXX */ }; -Bool RADEONAllocateControllers(ScrnInfoPtr pScrn) +Bool RADEONAllocateControllers(ScrnInfoPtr pScrn, int mask) { RADEONEntPtr pRADEONEnt = RADEONEntPriv(pScrn); - if (pRADEONEnt->Controller[0]) - return TRUE; + if (mask & 1) { + if (pRADEONEnt->Controller[0]) + return TRUE; + + pRADEONEnt->pCrtc[0] = xf86CrtcCreate(pScrn, &radeon_crtc_funcs); + if (!pRADEONEnt->pCrtc[0]) + return FALSE; - pRADEONEnt->pCrtc[0] = xf86CrtcCreate(pScrn, &radeon_crtc_funcs); - if (!pRADEONEnt->pCrtc[0]) - return FALSE; + pRADEONEnt->Controller[0] = xnfcalloc(sizeof(RADEONCrtcPrivateRec), 1); + if (!pRADEONEnt->Controller[0]) + return FALSE; - pRADEONEnt->Controller[0] = xnfcalloc(sizeof(RADEONCrtcPrivateRec), 1); - if (!pRADEONEnt->Controller[0]) - return FALSE; + pRADEONEnt->pCrtc[0]->driver_private = pRADEONEnt->Controller[0]; + pRADEONEnt->Controller[0]->crtc_id = 0; - pRADEONEnt->pCrtc[0]->driver_private = pRADEONEnt->Controller[0]; - pRADEONEnt->Controller[0]->crtc_id = 0; - - if (!pRADEONEnt->HasCRTC2) - return TRUE; + } - pRADEONEnt->pCrtc[1] = xf86CrtcCreate(pScrn, &radeon_crtc_funcs); - if (!pRADEONEnt->pCrtc[1]) - return FALSE; + if (mask & 2) { + if (!pRADEONEnt->HasCRTC2) + return TRUE; + + pRADEONEnt->pCrtc[1] = xf86CrtcCreate(pScrn, &radeon_crtc_funcs); + if (!pRADEONEnt->pCrtc[1]) + return FALSE; + + pRADEONEnt->Controller[1] = xnfcalloc(sizeof(RADEONCrtcPrivateRec), 1); + if (!pRADEONEnt->Controller[1]) + { + xfree(pRADEONEnt->Controller[0]); + return FALSE; + } - pRADEONEnt->Controller[1] = xnfcalloc(sizeof(RADEONCrtcPrivateRec), 1); - if (!pRADEONEnt->Controller[1]) - { - xfree(pRADEONEnt->Controller[0]); - return FALSE; + pRADEONEnt->pCrtc[1]->driver_private = pRADEONEnt->Controller[1]; + pRADEONEnt->Controller[1]->crtc_id = 1; } - - pRADEONEnt->pCrtc[1]->driver_private = pRADEONEnt->Controller[1]; - pRADEONEnt->Controller[1]->crtc_id = 1; return TRUE; } -- cgit v1.2.3 From f2b2e0804183b52d9d3f56ad85b3552ece76c544 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 12 Dec 2007 22:18:37 -0500 Subject: RADEON: fix rotation on avivo chips There are still some issues, but this is better than before. --- src/radeon_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index fa2aba03..caf73691 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -1268,7 +1268,7 @@ radeon_crtc_shadow_create(xf86CrtcPtr crtc, void *data, int width, int height) if (!data) data = radeon_crtc_shadow_allocate(crtc, width, height); - + rotate_pitch = pScrn->displayWidth * cpp; rotate_pixmap = GetScratchPixmapHeader(pScrn->pScreen, -- cgit v1.2.3 From 814c6c48aebba2e45ce257289b922cd7e92caf2a Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 13 Dec 2007 18:45:09 -0500 Subject: RADEON: rework PLL calculation - Take into account the limits from the bios tables - Unify the PLL calculation between legacy and avivo chips --- src/radeon_crtc.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index cf78e2cb..45eb1acd 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -631,7 +631,7 @@ static CARD32 RADEONDiv64(CARD64 n, CARD32 d) return (n + (d / 2)) / d; } -static void +void RADEONComputePLL(RADEONPLLPtr pll, unsigned long freq, CARD32 *chosen_dot_clock_freq, @@ -639,10 +639,6 @@ RADEONComputePLL(RADEONPLLPtr pll, CARD32 *chosen_reference_div, CARD32 *chosen_post_div) { - int post_divs[] = {1, 2, 4, 8, 3, 6, 12, 0}; - - int i; - CARD32 best_vco = pll->best_vco; CARD32 best_post_div = 1; CARD32 best_ref_div = 1; @@ -650,15 +646,15 @@ RADEONComputePLL(RADEONPLLPtr pll, CARD32 best_freq = 1; CARD32 best_error = 0xffffffff; CARD32 best_vco_diff = 1; + CARD32 post_div; ErrorF("freq: %lu\n", freq); - for (i = 0; post_divs[i]; i++) { - int post_div = post_divs[i]; + for (post_div = pll->min_post_div; post_div <= pll->max_post_div; ++post_div) { CARD32 ref_div; CARD32 vco = (freq / 10000) * post_div; - if (vco < pll->min_pll_freq || vco > pll->max_pll_freq) + if (vco < pll->pll_out_min || vco > pll->pll_out_max) continue; for (ref_div = pll->min_ref_div; ref_div <= pll->max_ref_div; ++ref_div) { -- cgit v1.2.3 From a9817b2cf436a536dbc43ad77abc3bdcc53d346d Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Sat, 15 Dec 2007 20:51:53 -0500 Subject: RADEON: clean up units in PLL calculation --- src/radeon_crtc.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 45eb1acd..611c9abe 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -690,10 +690,10 @@ RADEONComputePLL(RADEONPLLPtr pll, } } - ErrorF("best_freq: %d\n", best_freq); - ErrorF("best_feedback_div: %d\n", best_feedback_div); - ErrorF("best_ref_div: %d\n", best_ref_div); - ErrorF("best_post_div: %d\n", best_post_div); + ErrorF("best_freq: %u\n", best_freq); + ErrorF("best_feedback_div: %u\n", best_feedback_div); + ErrorF("best_ref_div: %u\n", best_ref_div); + ErrorF("best_post_div: %u\n", best_post_div); *chosen_dot_clock_freq = best_freq; *chosen_feedback_div = best_feedback_div; -- cgit v1.2.3 From 03b8b49f6f502c45552b018fd8c44d366b2d576f Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 17 Dec 2007 20:20:04 -0500 Subject: RADEON: fix typo from merge --- src/radeon_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index d2271b05..5e9db39f 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -625,7 +625,7 @@ static int RADEONDiv(int n, int d) return (n + (d / 2)) / d; } -static void +void RADEONComputePLL(RADEONPLLPtr pll, unsigned long freq, CARD32 *chosen_dot_clock_freq, -- cgit v1.2.3 From d93a0e10b8bc6e3797a3cf6c1e28ca413a7c38e4 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Mon, 17 Dec 2007 20:32:45 -0500 Subject: RADEON: post div tweaks for legacy radeon --- src/radeon_crtc.c | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index 5e9db39f..ea125567 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -659,6 +659,16 @@ RADEONComputePLL(RADEONPLLPtr pll, if ((flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) continue; + /* legacy radeons only have a few post_divs */ + if (flags & RADEON_PLL_LEGACY) { + if ((post_div == 5) || + (post_div == 7) || + (post_div == 9) || + (post_div == 10) || + (post_div == 11)) + continue; + } + if (vco < pll->pll_out_min || vco > pll->pll_out_max) continue; @@ -893,7 +903,7 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, Bool tilingOld = info->tilingEnabled; int i = 0; double dot_clock = 0; - int pll_flags = 0; + int pll_flags = RADEON_PLL_LEGACY; Bool update_tv_routing = FALSE; -- cgit v1.2.3 From 65a3ac7530e11bb7d818a988fd0cf1dde7688fa4 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 18 Dec 2007 00:15:38 -0500 Subject: RADEON: more PLL tweaks --- src/radeon_crtc.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index ea125567..eb892f24 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -620,7 +620,7 @@ RADEONInitCrtc2Registers(xf86CrtcPtr crtc, RADEONSavePtr save, } -static int RADEONDiv(int n, int d) +static CARD32 RADEONDiv(CARD64 n, CARD32 d) { return (n + (d / 2)) / d; } @@ -645,7 +645,7 @@ RADEONComputePLL(RADEONPLLPtr pll, CARD32 best_vco_diff = 1; CARD32 post_div; - freq = freq / 10; + freq = freq * 1000; ErrorF("freq: %lu\n", freq); @@ -654,7 +654,7 @@ RADEONComputePLL(RADEONPLLPtr pll, for (post_div = pll->min_post_div; post_div <= pll->max_post_div; ++post_div) { CARD32 ref_div; - CARD32 vco = freq * post_div; + CARD32 vco = (freq / 10000) * post_div; if ((flags & RADEON_PLL_NO_ODD_POST_DIV) && (post_div & 1)) continue; @@ -679,21 +679,22 @@ RADEONComputePLL(RADEONPLLPtr pll, if (pll_in < pll->pll_in_min || pll_in > pll->pll_in_max) continue; - feedback_div = RADEONDiv(freq * ref_div * post_div, - pll->reference_freq); + feedback_div = RADEONDiv((CARD64)freq * ref_div * post_div, + pll->reference_freq * 10000); if (feedback_div < pll->min_feedback_div || feedback_div > pll->max_feedback_div) continue; - current_freq = RADEONDiv(pll->reference_freq * feedback_div, + current_freq = RADEONDiv((CARD64)pll->reference_freq * 10000 * feedback_div, ref_div * post_div); error = abs(current_freq - freq); vco_diff = abs(vco - best_vco); if ((best_vco == 0 && error < best_error) || + (ref_div == pll->reference_div) || (best_vco != 0 && - (error < best_error - 1000 || + (error < best_error - 100 || (abs(error - best_error) < 100 && vco_diff < best_vco_diff )))) { best_post_div = post_div; best_ref_div = ref_div; @@ -710,7 +711,7 @@ RADEONComputePLL(RADEONPLLPtr pll, ErrorF("best_ref_div: %u\n", best_ref_div); ErrorF("best_post_div: %u\n", best_post_div); - *chosen_dot_clock_freq = best_freq; + *chosen_dot_clock_freq = best_freq / 10000; *chosen_feedback_div = best_feedback_div; *chosen_reference_div = best_ref_div; *chosen_post_div = best_post_div; -- cgit v1.2.3 From bd7206fa120495037e3fea0c920d0031d7715bf6 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Tue, 18 Dec 2007 03:03:11 -0500 Subject: RADEON: fix another merge error this broken legacy radeons --- src/radeon_crtc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/radeon_crtc.c') diff --git a/src/radeon_crtc.c b/src/radeon_crtc.c index eb892f24..2d4ac15e 100644 --- a/src/radeon_crtc.c +++ b/src/radeon_crtc.c @@ -953,7 +953,7 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, dot_clock = adjusted_mode->Clock / 1000.0; if (dot_clock) { ErrorF("init pll1\n"); - RADEONInitPLLRegisters(pScrn, &info->ModeReg, &info->pll, adjusted_mode, pll_flags); + RADEONInitPLLRegisters(pScrn, info->ModeReg, &info->pll, adjusted_mode, pll_flags); } else { info->ModeReg->ppll_ref_div = info->SavedReg->ppll_ref_div; info->ModeReg->ppll_div_3 = info->SavedReg->ppll_div_3; @@ -967,7 +967,7 @@ legacy_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, dot_clock = adjusted_mode->Clock / 1000.0; if (dot_clock) { ErrorF("init pll2\n"); - RADEONInitPLL2Registers(pScrn, &info->ModeReg, &info->pll, adjusted_mode, pll_flags); + RADEONInitPLL2Registers(pScrn, info->ModeReg, &info->pll, adjusted_mode, pll_flags); } break; } -- cgit v1.2.3