From 98b2d5fe1722a43c4bbe7711ed7180a3fb65305f Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Mon, 5 Dec 2011 18:44:28 +0000 Subject: radeon: r200 depth buffers are always tiled When we do the allocations we need to make sure the always tiled nature is taken into account. Signed-off-by: Dave Airlie --- src/radeon_dri2.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/radeon_dri2.c') diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c index 8789d735..9fd3658f 100644 --- a/src/radeon_dri2.c +++ b/src/radeon_dri2.c @@ -121,6 +121,8 @@ radeon_dri2_create_buffers(DrawablePtr drawable, flags = RADEON_CREATE_PIXMAP_TILING_MICRO; else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; + if (IS_R200_3D) + flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferDepthStencil: if (info->ChipFamily >= CHIP_FAMILY_R600) { @@ -132,6 +134,8 @@ radeon_dri2_create_buffers(DrawablePtr drawable, need_enlarge = 1; } else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; + if (IS_R200_3D) + flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferBackLeft: case DRI2BufferBackRight: @@ -271,6 +275,8 @@ radeon_dri2_create_buffer(DrawablePtr drawable, flags = RADEON_CREATE_PIXMAP_TILING_MICRO; else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; + if (IS_R200_3D) + flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferDepthStencil: /* macro is the preferred setting, but the 2D detiling for software @@ -282,6 +288,8 @@ radeon_dri2_create_buffer(DrawablePtr drawable, need_enlarge = 1; } else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; + if (IS_R200_3D) + flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferBackLeft: case DRI2BufferBackRight: -- cgit v1.2.3