From ba46c7b0cf72d157748981eb3224d5eefb6200aa Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 6 Dec 2011 13:42:49 +0000 Subject: radeon: refine always tiled depth check So it appears the M7 family always tiles its depth buffer also. Signed-off-by: Dave Airlie --- src/radeon_dri2.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'src/radeon_dri2.c') diff --git a/src/radeon_dri2.c b/src/radeon_dri2.c index 9fd3658f..54637919 100644 --- a/src/radeon_dri2.c +++ b/src/radeon_dri2.c @@ -121,7 +121,7 @@ radeon_dri2_create_buffers(DrawablePtr drawable, flags = RADEON_CREATE_PIXMAP_TILING_MICRO; else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; - if (IS_R200_3D) + if (IS_R200_3D || info->ChipFamiy == CHIP_FAMILY_RV200) flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferDepthStencil: @@ -134,7 +134,7 @@ radeon_dri2_create_buffers(DrawablePtr drawable, need_enlarge = 1; } else flags = RADEON_CREATE_PIXMAP_TILING_MACRO | RADEON_CREATE_PIXMAP_TILING_MICRO; - if (IS_R200_3D) + if (IS_R200_3D || info->ChipFamily == CHIP_FAMILY_RV200) flags |= RADEON_CREATE_PIXMAP_DEPTH; break; case DRI2BufferBackLeft: -- cgit v1.2.3