From 903e90c31cf0319be9297529aa7b8daa1756cf63 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 20 Apr 2011 03:10:08 -0400 Subject: EXA/Xv: used cached bo tiling flags for accel setup on 6xx+ This avoids calling into the kernel for each bo in the accel code. This is a follow on to: cc7d1fa39da40a532fcdbe6c7924ca47a879e66a Signed-off-by: Alex Deucher --- src/radeon_exa.c | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'src/radeon_exa.c') diff --git a/src/radeon_exa.c b/src/radeon_exa.c index c11c938a..f3daec04 100644 --- a/src/radeon_exa.c +++ b/src/radeon_exa.c @@ -532,6 +532,13 @@ struct radeon_bo *radeon_get_pixmap_bo(PixmapPtr pPix) return driver_priv->bo; } +uint32_t radeon_get_pixmap_tiling(PixmapPtr pPix) +{ + struct radeon_exa_pixmap_priv *driver_priv; + driver_priv = exaGetPixmapDriverPrivate(pPix); + return driver_priv->tiling_flags; +} + void radeon_set_pixmap_bo(PixmapPtr pPix, struct radeon_bo *bo) { struct radeon_exa_pixmap_priv *driver_priv; -- cgit v1.2.3