From ba46c7b0cf72d157748981eb3224d5eefb6200aa Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Tue, 6 Dec 2011 13:42:49 +0000 Subject: radeon: refine always tiled depth check So it appears the M7 family always tiles its depth buffer also. Signed-off-by: Dave Airlie --- src/radeon_exa.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'src/radeon_exa.c') diff --git a/src/radeon_exa.c b/src/radeon_exa.c index 95646ab1..554af363 100644 --- a/src/radeon_exa.c +++ b/src/radeon_exa.c @@ -473,7 +473,7 @@ void *RADEONEXACreatePixmap2(ScreenPtr pScreen, int width, int height, if (usage_hint & RADEON_CREATE_PIXMAP_TILING_MICRO) tiling |= RADEON_TILING_MICRO; } - if ((usage_hint & RADEON_CREATE_PIXMAP_DEPTH) && IS_R200_3D) + if (usage_hint & RADEON_CREATE_PIXMAP_DEPTH) tiling |= RADEON_TILING_MACRO | RADEON_TILING_MICRO; } -- cgit v1.2.3