From 3ec99c9cd821aeacdd57a9bbc20c4e4ec4711790 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Thu, 30 Jun 2005 00:56:01 +0000 Subject: - Increase the priority of display 0/1 in the memory controller for r3/4xx hardware when displaypriority is set to HIGH. Fixes display problems in high res modes. Originally reported by Aapo Tahkola. --- src/radeon_reg.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/radeon_reg.h') diff --git a/src/radeon_reg.h b/src/radeon_reg.h index 4048fecc..5958c1cf 100644 --- a/src/radeon_reg.h +++ b/src/radeon_reg.h @@ -816,6 +816,7 @@ #define RADEON_DISPLAY2_BASE_ADDR 0x33c #define RADEON_OV0_BASE_ADDR 0x43c #define RADEON_NB_TOM 0x15c +#define R300_MC_INIT_MISC_LAT_TIMER 0x180 #define RADEON_MCLK_CNTL 0x0012 /* PLL */ # define RADEON_FORCEON_MCLKA (1 << 16) # define RADEON_FORCEON_MCLKB (1 << 17) -- cgit v1.2.3