From 47a145bb4a2aaaa945d43cd53f5a0cc8511fcfdf Mon Sep 17 00:00:00 2001 From: Alan Coopersmith Date: Sat, 24 Feb 2024 16:28:51 -0800 Subject: RADEONInit3DEngineInternal: remove unused variable gb_tile_config Prior to commit 18d5ae3bd9075ac1a2ee21b071ac133e2e634b62 gb_tile_config was used in OUTREG(R300_GB_TILE_CONFIG, gb_tile_config); but since then it's unused, and is flagged by recent clang versions: radeon_accel.c:209:14: error: variable 'gb_tile_config' set but not used [-Werror,-Wunused-but-set-variable] uint32_t gb_tile_config, vap_cntl; ^ Signed-off-by: Alan Coopersmith Part-of: --- src/radeon_accel.c | 12 +----------- 1 file changed, 1 insertion(+), 11 deletions(-) (limited to 'src') diff --git a/src/radeon_accel.c b/src/radeon_accel.c index fc80ed74..8d4e76a5 100644 --- a/src/radeon_accel.c +++ b/src/radeon_accel.c @@ -206,23 +206,13 @@ Bool RADEONAccelInit(ScreenPtr pScreen) static void RADEONInit3DEngineInternal(ScrnInfoPtr pScrn) { RADEONInfoPtr info = RADEONPTR(pScrn); - uint32_t gb_tile_config, vap_cntl; + uint32_t vap_cntl; info->accel_state->texW[0] = info->accel_state->texH[0] = info->accel_state->texW[1] = info->accel_state->texH[1] = 1; if (IS_R300_3D || IS_R500_3D) { - gb_tile_config = (R300_ENABLE_TILING | R300_TILE_SIZE_16); - - switch(info->accel_state->num_gb_pipes) { - case 2: gb_tile_config |= R300_PIPE_COUNT_R300; break; - case 3: gb_tile_config |= R300_PIPE_COUNT_R420_3P; break; - case 4: gb_tile_config |= R300_PIPE_COUNT_R420; break; - default: - case 1: gb_tile_config |= R300_PIPE_COUNT_RV350; break; - } - BEGIN_RING(2*3); OUT_RING_REG(R300_RB3D_DSTCACHE_CTLSTAT, R300_DC_FLUSH_3D | R300_DC_FREE_3D); OUT_RING_REG(R300_RB3D_ZCACHE_CTLSTAT, R300_ZC_FLUSH | R300_ZC_FREE); -- cgit v1.2.3