From e4cd0f4392ea11c93088ad429f36eaaf9bcbf505 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Wed, 30 Oct 2013 15:21:26 -0400 Subject: radeon: enable tiling on SI by default (v2) Now that mesa 9.2 is out with support for tiling on SI asics, we can enable it here. Tiling improves memory bandwidth utilization. V2: update man page Signed-off-by: Alex Deucher --- src/radeon_kms.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'src') diff --git a/src/radeon_kms.c b/src/radeon_kms.c index 255906b8..5b85acc3 100644 --- a/src/radeon_kms.c +++ b/src/radeon_kms.c @@ -860,17 +860,17 @@ Bool RADEONPreInit_KMS(ScrnInfoPtr pScrn, int flags) Bool colorTilingDefault = xorgGetVersion() >= XORG_VERSION_NUMERIC(1,9,4,901,0) && info->ChipFamily >= CHIP_FAMILY_R300 && - /* this ARUBA check could be removed sometime after a big mesa release + /* this check could be removed sometime after a big mesa release * with proper bit, in the meantime you need to set tiling option in * xorg configuration files */ - info->ChipFamily <= CHIP_FAMILY_ARUBA && + info->ChipFamily <= CHIP_FAMILY_HAINAN && !info->is_fast_fb; /* 2D color tiling */ if (info->ChipFamily >= CHIP_FAMILY_R600) { info->allowColorTiling2D = xf86ReturnOptValBool(info->Options, OPTION_COLOR_TILING_2D, - info->ChipFamily <= CHIP_FAMILY_ARUBA); + info->ChipFamily <= CHIP_FAMILY_HAINAN); } if (info->ChipFamily >= CHIP_FAMILY_R600) { -- cgit v1.2.3