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authorMartin-Éric Racine <martin-eric.racine@iki.fi>2012-07-11 15:50:28 +0300
committerMartin-Éric Racine <martin-eric.racine@iki.fi>2012-07-11 15:50:28 +0300
commit1ed67d70ac9d3afd9b372c311aaf7b77e38b3e21 (patch)
tree134ec66d59b987c039a0690707d51fb15c99dd60 /src/gfx/i2c_acc.c
parentb9afafec0a26eaec49e7f0ff08297c2bb795a9c2 (diff)
Whitespace cleanup using ../modular/x-indent.sh
Diffstat (limited to 'src/gfx/i2c_acc.c')
-rw-r--r--src/gfx/i2c_acc.c135
1 files changed, 70 insertions, 65 deletions
diff --git a/src/gfx/i2c_acc.c b/src/gfx/i2c_acc.c
index a45a2c3..f6a0b2f 100644
--- a/src/gfx/i2c_acc.c
+++ b/src/gfx/i2c_acc.c
@@ -48,15 +48,15 @@ unsigned short index_reg, data_reg;
/* ACCESS BUS DEFINITIONS */
-#define ACC_I2C_TIMEOUT 1000000 /* Number of reads before timing out */
-#define ACB1_BASE 0x810 /* ACCESS.bus base addresses */
+#define ACC_I2C_TIMEOUT 1000000 /* Number of reads before timing out */
+#define ACB1_BASE 0x810 /* ACCESS.bus base addresses */
#define ACB2_BASE 0x820
-#define ACBSDA 0 /* ACB serial data */
-#define ACBST 1 /* ACB status */
-#define ACBCST 2 /* ACB control status */
-#define ACBCTL1 3 /* ACB control 1 */
-#define ACBADDR 4 /* ACB own address */
-#define ACBCTL2 5 /* ACB control 2 */
+#define ACBSDA 0 /* ACB serial data */
+#define ACBST 1 /* ACB status */
+#define ACBCST 2 /* ACB control status */
+#define ACBCTL1 3 /* ACB control 1 */
+#define ACBADDR 4 /* ACB own address */
+#define ACBCTL2 5 /* ACB control 2 */
#define LDN 0x7 /* Logical Device Numbers */
#define ACB1_LDN 0x5
#define ACB2_LDN 0x6
@@ -64,6 +64,7 @@ unsigned short index_reg, data_reg;
/* INITIAL ACCESS.bus BASE ADDRESS VALUES */
unsigned short base_address_array[3] = { 0, ACB1_BASE, ACB2_BASE };
+
char Freq = 0x71;
/* LOCAL ACCESS.bus FUNCTION DECLARATIONS */
@@ -88,7 +89,7 @@ unsigned short acc_i2c_set_base_address(unsigned char busnum, short adr);
/* LOCAL HELPER ROUTINES */
void OsPciReadDWord(int bus, int dev, int func, int address,
- unsigned long *data);
+ unsigned long *data);
int sio_set_index_data_reg(void);
void sio_write_reg(unsigned char reg, unsigned char data);
unsigned char sio_read_reg(unsigned char reg);
@@ -112,8 +113,8 @@ OsPciReadDWord(int bus, int dev, int func, int address, unsigned long *data)
* {10000000,bus[23:16],device[15:11],function[10:8],address[7:2],00}
*/
long addr = (0x80000000 |
- ((bus & 0xff) << 16) |
- ((dev & 0x1f) << 11) | ((func & 0x7) << 8) | (address & 0xff));
+ ((bus & 0xff) << 16) |
+ ((dev & 0x1f) << 11) | ((func & 0x7) << 8) | (address & 0xff));
OUTD(PCI_INDEX, addr);
*data = IND(PCI_DATA);
}
@@ -135,7 +136,7 @@ sio_set_index_data_reg(void)
OsPciReadDWord(0, 0x12, 5, 0x10, &xbus_expention_bar);
xbus_expention_bar = xbus_expention_bar & 0xfffffffe;
- io_control_reg1 = IND((unsigned short)xbus_expention_bar);
+ io_control_reg1 = IND((unsigned short) xbus_expention_bar);
if ((io_control_reg1) & (SIO_BASE_ADR_15C_15D)) {
index_reg = INDEX_1;
@@ -240,11 +241,11 @@ gfx_i2c_select_gpio(int clock, int data)
#if GFX_I2C_DYNAMIC
int
acc_i2c_write(unsigned char busnum, unsigned char chipadr,
- unsigned char subadr, unsigned char bytes, unsigned char *data)
+ unsigned char subadr, unsigned char bytes, unsigned char *data)
#else
int
gfx_i2c_write(unsigned char busnum, unsigned char chipadr,
- unsigned char subadr, unsigned char bytes, unsigned char *data)
+ unsigned char subadr, unsigned char bytes, unsigned char *data)
#endif
{
int loop = 0;
@@ -261,7 +262,7 @@ gfx_i2c_write(unsigned char busnum, unsigned char chipadr,
acc_i2c_ack(busnum, 1, 0);
acc_i2c_stall_after_start(busnum, 1);
- acc_i2c_send_address(busnum, (unsigned char)(chipadr & 0xFE));
+ acc_i2c_send_address(busnum, (unsigned char) (chipadr & 0xFE));
acc_i2c_stall_after_start(busnum, 0);
if (!acc_i2c_ack(busnum, 0, 0))
return (GFX_STATUS_ERROR);
@@ -297,11 +298,11 @@ gfx_i2c_write(unsigned char busnum, unsigned char chipadr,
#if GFX_I2C_DYNAMIC
int
acc_i2c_read(unsigned char busnum, unsigned char chipadr,
- unsigned char subadr, unsigned char bytes, unsigned char *data)
+ unsigned char subadr, unsigned char bytes, unsigned char *data)
#else
int
gfx_i2c_read(unsigned char busnum, unsigned char chipadr,
- unsigned char subadr, unsigned char bytes, unsigned char *data)
+ unsigned char subadr, unsigned char bytes, unsigned char *data)
#endif
{
unsigned char bytesRead;
@@ -321,7 +322,7 @@ gfx_i2c_read(unsigned char busnum, unsigned char chipadr,
acc_i2c_ack(busnum, 1, 0);
acc_i2c_stall_after_start(busnum, 1);
- acc_i2c_send_address(busnum, (unsigned char)(chipadr & 0xFE));
+ acc_i2c_send_address(busnum, (unsigned char) (chipadr & 0xFE));
acc_i2c_stall_after_start(busnum, 0);
if (!acc_i2c_ack(busnum, 0, 0))
return (GFX_STATUS_ERROR);
@@ -340,7 +341,7 @@ gfx_i2c_read(unsigned char busnum, unsigned char chipadr,
acc_i2c_ack(busnum, 1, 1);
acc_i2c_stall_after_start(busnum, 1);
- acc_i2c_send_address(busnum, (unsigned char)(chipadr | 0x01));
+ acc_i2c_send_address(busnum, (unsigned char) (chipadr | 0x01));
/* IF LAST BYTE */
@@ -360,11 +361,13 @@ gfx_i2c_read(unsigned char busnum, unsigned char chipadr,
if (bytesRead < (bytes - 2)) {
data[bytesRead] = acc_i2c_read_byte(busnum, 0);
acc_i2c_ack(busnum, 1, 0);
- } else if (bytesRead == (bytes - 2)) { /* TWO BYTES LEFT */
+ }
+ else if (bytesRead == (bytes - 2)) { /* TWO BYTES LEFT */
acc_i2c_ack(busnum, 1, 1);
data[bytesRead] = acc_i2c_read_byte(busnum, 0);
acc_i2c_ack(busnum, 1, 1);
- } else { /* LAST BYTE */
+ }
+ else { /* LAST BYTE */
data[bytesRead] = acc_i2c_read_byte(busnum, 1);
acc_i2c_stop(busnum);
@@ -432,32 +435,32 @@ acc_i2c_reset_bus(unsigned char busnum)
/* Disable the ACCESS.bus device and */
/* Configure the SCL frequency */
- OUTB((unsigned short)(bus_base_address + ACBCTL2),
- (unsigned char)(Freq & 0xFE));
+ OUTB((unsigned short) (bus_base_address + ACBCTL2),
+ (unsigned char) (Freq & 0xFE));
/* Configure no interrupt mode (polling) and */
/* Disable global call address */
- OUTB((unsigned short)(bus_base_address + ACBCTL1), 0x0);
+ OUTB((unsigned short) (bus_base_address + ACBCTL1), 0x0);
/* Disable slave address */
- OUTB((unsigned short)(bus_base_address + ACBADDR), 0x0);
+ OUTB((unsigned short) (bus_base_address + ACBADDR), 0x0);
/* Enable the ACCESS.bus device */
- reg = INB((unsigned short)(bus_base_address + ACBCTL2));
+ reg = INB((unsigned short) (bus_base_address + ACBCTL2));
reg |= 0x01;
- OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
+ OUTB((unsigned short) (bus_base_address + ACBCTL2), reg);
/* Issue STOP event */
acc_i2c_stop(busnum);
/* Clear NEGACK, STASTR and BER bits */
- OUTB((unsigned short)(bus_base_address + ACBST), 0x38);
+ OUTB((unsigned short) (bus_base_address + ACBST), 0x38);
/* Clear BB (BUS BUSY) bit */
- reg = INB((unsigned short)(bus_base_address + ACBCST));
+ reg = INB((unsigned short) (bus_base_address + ACBCST));
reg |= 0x02;
- OUTB((unsigned short)(bus_base_address + ACBCST), reg);
+ OUTB((unsigned short) (bus_base_address + ACBCST), reg);
}
/*---------------------------------------------------------------------------
@@ -472,9 +475,9 @@ acc_i2c_start(unsigned char busnum)
unsigned char reg;
unsigned short bus_base_address = base_address_array[busnum];
- reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+ reg = INB((unsigned short) (bus_base_address + ACBCTL1));
reg |= 0x01;
- OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+ OUTB((unsigned short) (bus_base_address + ACBCTL1), reg);
}
/*---------------------------------------------------------------------------
@@ -489,9 +492,9 @@ acc_i2c_stop(unsigned char busnum)
unsigned char reg;
unsigned short bus_base_address = base_address_array[busnum];
- reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+ reg = INB((unsigned short) (bus_base_address + ACBCTL1));
reg |= 0x02;
- OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+ OUTB((unsigned short) (bus_base_address + ACBCTL1), reg);
}
/*---------------------------------------------------------------------------
@@ -505,9 +508,9 @@ acc_i2c_abort_data(unsigned char busnum)
unsigned short bus_base_address = base_address_array[busnum];
acc_i2c_stop(busnum);
- reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+ reg = INB((unsigned short) (bus_base_address + ACBCTL1));
reg |= 0x10;
- OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+ OUTB((unsigned short) (bus_base_address + ACBCTL1), reg);
}
/*---------------------------------------------------------------------------
@@ -531,17 +534,17 @@ acc_i2c_stall_after_start(unsigned char busnum, int state)
unsigned char reg;
unsigned short bus_base_address = base_address_array[busnum];
- reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+ reg = INB((unsigned short) (bus_base_address + ACBCTL1));
if (state)
reg |= 0x80;
else
reg &= 0x7F;
- OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+ OUTB((unsigned short) (bus_base_address + ACBCTL1), reg);
if (!state) {
- reg = INB((unsigned short)(bus_base_address + ACBST));
+ reg = INB((unsigned short) (bus_base_address + ACBST));
reg |= 0x08;
- OUTB((unsigned short)(bus_base_address + ACBST), reg);
+ OUTB((unsigned short) (bus_base_address + ACBST), reg);
}
}
@@ -558,10 +561,10 @@ acc_i2c_send_address(unsigned char busnum, unsigned char cData)
/* WRITE THE DATA */
- OUTB((unsigned short)(bus_base_address + ACBSDA), cData);
+ OUTB((unsigned short) (bus_base_address + ACBSDA), cData);
while (1) {
- reg = INB((unsigned short)(bus_base_address + ACBST));
- if ((reg & 0x38) != 0) /* check STASTR, BER and NEGACK */
+ reg = INB((unsigned short) (bus_base_address + ACBST));
+ if ((reg & 0x38) != 0) /* check STASTR, BER and NEGACK */
break;
if (timeout++ == ACC_I2C_TIMEOUT) {
acc_i2c_bus_recovery(busnum);
@@ -598,23 +601,25 @@ acc_i2c_ack(unsigned char busnum, int fPut, int negAck)
unsigned short bus_base_address = base_address_array[busnum];
unsigned long timeout = 0;
- if (fPut) { /* read operation */
+ if (fPut) { /* read operation */
if (!negAck) {
/* Push Ack onto I2C bus */
- reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+ reg = INB((unsigned short) (bus_base_address + ACBCTL1));
reg &= 0xE7;
- OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
- } else {
+ OUTB((unsigned short) (bus_base_address + ACBCTL1), reg);
+ }
+ else {
/* Push negAck onto I2C bus */
- reg = INB((unsigned short)(bus_base_address + ACBCTL1));
+ reg = INB((unsigned short) (bus_base_address + ACBCTL1));
reg |= 0x10;
- OUTB((unsigned short)(bus_base_address + ACBCTL1), reg);
+ OUTB((unsigned short) (bus_base_address + ACBCTL1), reg);
}
- } else { /* write operation */
+ }
+ else { /* write operation */
/* Receive Ack from I2C bus */
while (1) {
- reg = INB((unsigned short)(bus_base_address + ACBST));
- if ((reg & 0x70) != 0) /* check SDAST, BER and NEGACK */
+ reg = INB((unsigned short) (bus_base_address + ACBST));
+ if ((reg & 0x70) != 0) /* check SDAST, BER and NEGACK */
break;
if (timeout++ == ACC_I2C_TIMEOUT) {
acc_i2c_bus_recovery(busnum);
@@ -651,9 +656,9 @@ acc_i2c_stop_clock(unsigned char busnum)
unsigned char reg;
unsigned short bus_base_address = base_address_array[busnum];
- reg = INB((unsigned short)(bus_base_address + ACBCTL2));
+ reg = INB((unsigned short) (bus_base_address + ACBCTL2));
reg &= ~0x01;
- OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
+ OUTB((unsigned short) (bus_base_address + ACBCTL2), reg);
}
/*---------------------------------------------------------------------------
@@ -668,9 +673,9 @@ acc_i2c_activate_clock(unsigned char busnum)
unsigned char reg;
unsigned short bus_base_address = base_address_array[busnum];
- reg = INB((unsigned short)(bus_base_address + ACBCTL2));
+ reg = INB((unsigned short) (bus_base_address + ACBCTL2));
reg |= 0x01;
- OUTB((unsigned short)(bus_base_address + ACBCTL2), reg);
+ OUTB((unsigned short) (bus_base_address + ACBCTL2), reg);
}
/*---------------------------------------------------------------------------
@@ -687,7 +692,7 @@ acc_i2c_write_byte(unsigned char busnum, unsigned char cData)
unsigned long timeout = 0;
while (1) {
- reg = INB((unsigned short)(bus_base_address + ACBST));
+ reg = INB((unsigned short) (bus_base_address + ACBST));
if (reg & 0x70)
break;
if (timeout++ == ACC_I2C_TIMEOUT) {
@@ -712,7 +717,7 @@ acc_i2c_write_byte(unsigned char busnum, unsigned char cData)
/* WRITE THE DATA */
- OUTB((unsigned short)(bus_base_address + ACBSDA), cData);
+ OUTB((unsigned short) (bus_base_address + ACBSDA), cData);
}
/*---------------------------------------------------------------------------
@@ -729,7 +734,7 @@ acc_i2c_read_byte(unsigned char busnum, int last_byte)
unsigned long timeout = 0;
while (1) {
- reg = INB((unsigned short)(bus_base_address + ACBST));
+ reg = INB((unsigned short) (bus_base_address + ACBST));
if (reg & 0x60)
break;
if (timeout++ == ACC_I2C_TIMEOUT) {
@@ -748,7 +753,7 @@ acc_i2c_read_byte(unsigned char busnum, int last_byte)
/* READ DATA */
if (last_byte)
acc_i2c_stop_clock(busnum);
- cData = INB((unsigned short)(bus_base_address + ACBSDA));
+ cData = INB((unsigned short) (bus_base_address + ACBSDA));
if (last_byte)
acc_i2c_activate_clock(busnum);
@@ -768,7 +773,7 @@ acc_i2c_request_master(unsigned char busnum)
acc_i2c_start(busnum);
while (1) {
- reg = INB((unsigned short)(bus_base_address + ACBST));
+ reg = INB((unsigned short) (bus_base_address + ACBST));
if (reg & 0x60)
break;
if (timeout++ == ACC_I2C_TIMEOUT) {
@@ -821,7 +826,7 @@ acc_i2c_set_freq(unsigned char busnum, char freq)
{
unsigned short bus_base_address = base_address_array[busnum];
- OUTB((unsigned short)(bus_base_address + ACBCTL2), 0x0);
+ OUTB((unsigned short) (bus_base_address + ACBCTL2), 0x0);
if (freq == -1)
freq = 0x71;
@@ -830,7 +835,7 @@ acc_i2c_set_freq(unsigned char busnum, char freq)
freq |= 0x01;
}
- OUTB((unsigned short)(bus_base_address + ACBCTL2), freq);
+ OUTB((unsigned short) (bus_base_address + ACBCTL2), freq);
return (freq);
}
@@ -867,8 +872,8 @@ acc_i2c_set_base_address(unsigned char busnum, short adr)
}
/* Set ACCESS.bus base address */
- sio_write_reg(BASE_ADR_LSB_REG, (unsigned char)(adr & 0xFF));
- sio_write_reg(BASE_ADR_MSB_REG, (unsigned char)(adr >> 8));
+ sio_write_reg(BASE_ADR_LSB_REG, (unsigned char) (adr & 0xFF));
+ sio_write_reg(BASE_ADR_MSB_REG, (unsigned char) (adr >> 8));
return adr;
}