1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
|
/* Copyright (c) 2005 Advanced Micro Devices, Inc.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documentation files (the "Software"), to
* deal in the Software without restriction, including without limitation the
* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the Software is
* furnished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
* IN THE SOFTWARE.
*
* Neither the name of the Advanced Micro Devices, Inc. nor the names of its
* contributors may be used to endorse or promote products derived from this
* software without specific prior written permission.
* */
/*
* File Contents: This file contains the panel library files to the
* GX2 platforms with 9211 support.
*
* SubModule: Geode FlatPanel library
* */
#include "92xx.h"
#include "gx2_9211.h"
#include "pnl_defs.h"
#if defined(_WIN32) /* windows */
#include "gfx_defs.h"
extern DEV_STATUS gfx_msr_read(unsigned int device, unsigned int msrRegister,
Q_WORD * msrValue);
extern DEV_STATUS gfx_msr_write(unsigned int device, unsigned int msrRegister,
Q_WORD * msrValue);
#endif
static unsigned long FPBaseAddr;
void
SetFPBaseAddr(unsigned long addr)
{
FPBaseAddr = addr;
}
/****************************************************************************
* protected_mode_access( unsigned long mode, unsigned long width,
* unsigned long addr, unsigned char* pdata )
* This function provides access to physical memory at the requested address.
*
* mode is:
* GX2_READ or GX2_WRITE (accesses a single byte, word or double word
* depending on the value of "width". Only 1, 2 or 4 supported).
* READ_BYTES, WRITE_BYTES accesses "width" number of bytes (8 bits)
* READ_WORDS, WRITE_WORDS accesses "width" number of words (16 bits)
* READ_DWORDS, WRITE_DWORDS accesses "width" number of dwords (32
* bits)
*
* width is:
* The size of the access. For READ or WRITE, only 1, 2 and 4 are
* supported. For other modes, width is not limited but will cause
* paging if the block traverses page boundaries.
*
* addr is:
* The physical address being accessed
*
* pdata is:
* A pointer to the data to be read or written into.
*
* NOTE! WORD or DWORD accesses can only be made on WORD or DWORD boundaries!
****************************************************************************/
void
protected_mode_access(unsigned long mode,
unsigned long width, unsigned long addr, char *pdata)
{
void *ptr = (void *)(FPBaseAddr + addr);
/* type specific buffer pointers */
char *byte_data = (char *)pdata;
unsigned long *word_data = (unsigned long *)pdata;
unsigned long *dword_data = (unsigned long *)pdata;
if (mode == GX2_READ) {
switch (width) {
case FOUR_BYTES:
*(dword_data) = (unsigned long)(*(unsigned long *)ptr);
break;
case TWO_BYTES:
*(word_data) = (unsigned long)(*(unsigned long *)ptr);
break;
default:
*(byte_data) = (char)(*(char *)ptr);
break;
}
} /* end GX2_READ */
else if (mode == GX2_WRITE) {
switch (width) {
case FOUR_BYTES:
*(unsigned long *)ptr = *dword_data;
break;
case TWO_BYTES:
*(unsigned long *)ptr = *word_data;
break;
default:
*(char *)ptr = *byte_data;
break;
} /* end switch(mode) */
}
/* end case GX2_WRITE */
return;
} /* End of protected_mode_access. */
/*************************************************************************
* void write_video_reg64_low( unsigned long offset, unsigned long value )
*
* Writes value to the low 32 bits of the 64 bit memory mapped video
* register indicated by offset.
* This function uses Sys_info.video_reg_base as the base address, so
* the value of offset should be with respect to this base.
*************************************************************************/
void
write_video_reg64_low(unsigned long offset, unsigned long value)
{
protected_mode_access(GX2_WRITE, FOUR_BYTES,
FPBaseAddr + offset, (char *)&value);
} /*end write_video_reg64_low() */
/*************************************************************************
* unsigned long read_video_reg64_low( unsigned long offset )
*
* Returns the contents of the low 32 bits of the 64 bit memory mapped
* video register indicated by offset.
* This function uses Sys_info.video_reg_base as the base address, so
* the value of offset should be with respect to this base.
*************************************************************************/
unsigned long
read_video_reg64_low(unsigned long offset)
{
unsigned long data;
protected_mode_access(GX2_READ, FOUR_BYTES,
FPBaseAddr + offset, (char *)&data);
return (data);
} /*end read_video_reg64_low() */
/*****************************************************************************
* void Redcloud_fp_reg(int mode, unsigned long address, unsigned long *data)
*
* Writes and reads dwords to the Redcloud flat panel registers in the
* Redcloud Display Filter. There's no clock control, chip select or timing
* to deal with.
* This routine expects the actual GX2 macro definitions for the address.
*
* Parameters:
* mode: An integer value for a GX2_READ or GX2_WRITE operation
* 0 = GX2_Read and 1 = GX2_Write
* address: A dword value representing the offset of the register.
* data: A pointer to a dword value that is to be written in to
* the required register. In case of a Read operation
* this will point to the result of the Read operation.
****************************************************************************/
void
Redcloud_fp_reg(int mode, unsigned long address, unsigned long *data)
{
if (mode == GX2_READ) {
*data = read_video_reg64_low(address);
} else {
write_video_reg64_low(address, *data);
}
} /* End of Redcloud_fp_reg() */
/*-------------------------------------------------------------------
*
* SET_92XX_MODE_PARAMS
* This routine sets the 9211 mode parameters.
*
*-------------------------------------------------------------------*/
void
set_Redcloud_92xx_mode_params(int mode)
{
CS92xx_MODE *pMode = &FPModeParams[mode];
unsigned long temp_data = 0;
unsigned long base_data;
Q_WORD msrValue;
/* on a Redcloud, we need to set up the DF pad select MSR */
if (gfx_msr_read(RC_ID_DF, GX2_VP_MSR_PAD_SELECT, &msrValue) == FOUND) {
msrValue.low &= ~GX2_VP_PAD_SELECT_MASK;
if (pMode->panel_type == PNL_TFT || pMode->panel_type == PNL_TWOP) {
msrValue.low = GX2_VP_PAD_SELECT_TFT;
} else {
msrValue.low = GX2_VP_PAD_SELECT_DSTN;
}
gfx_msr_write(RC_ID_DF, GX2_VP_MSR_PAD_SELECT, &msrValue);
}
/* Turn the 92xx power off before setting any new parameters. */
temp_data = pMode->power_management & ~GX2_FP_PM_PWR_ON;
Redcloud_fp_reg(GX2_WRITE, GX2_FP_PWR_MAN, (unsigned long *)&temp_data);
/* Set 9211 registers using the desired panel settings */
Redcloud_fp_reg(GX2_WRITE, GX2_FP_PAN_TIMING1,
(unsigned long *)&pMode->panel_timing1);
/* On Redcloud, bit 31 is now reserved. */
temp_data = pMode->panel_timing2 & 0x7FFFFFFF;
Redcloud_fp_reg(GX2_WRITE, GX2_FP_PAN_TIMING2,
(unsigned long *)&temp_data);
/* On Redcloud TFT parts, set this to 0x70 so all 8 bits per color run
* thru fp crc but only non-TFT parts. Otherwise, set it to be 0x50.
* (source: Larry G.).
*/
if (pMode->panel_type == PNL_TFT || pMode->panel_type == PNL_TWOP) {
temp_data = GX2_FP_CRC_PASS_THRU_MASK;
} else {
temp_data = pMode->rev_C_dither_frc;
}
Redcloud_fp_reg(GX2_WRITE, GX2_FP_DITH_FR_CNTRL,
(unsigned long *)&temp_data);
Redcloud_fp_reg(GX2_WRITE, GX2_FP_BLFSR,
(unsigned long *)&pMode->blue_lsfr_seed);
Redcloud_fp_reg(GX2_WRITE, GX2_FP_RLFSR,
(unsigned long *)&pMode->red_green_lsfr_seed);
/* Set the memory information, then the power register last.
* This will turn the panel on at the 9211.
*/
Redcloud_fp_reg(GX2_READ, GX2_FP_FBB, (unsigned long *)&base_data);
if (base_data != 0x41780000) {
base_data = 0x41780000;
Redcloud_fp_reg(GX2_WRITE, GX2_FP_FBB, (unsigned long *)&base_data);
}
Redcloud_fp_reg(GX2_WRITE, GX2_FP_PWR_MAN,
(unsigned long *)&pMode->power_management);
} /*end set_92xx_mode_params() */
/* -----------------------------------------------------------------------
* SET_FLAT_PANEL_MODE
*
* This routine sets the specified flat panel moden parameters in
* the 9211.
* Returns PASS if successful, FAIL if the mode parameters could
* not be set.
*------------------------------------------------------------------------*/
unsigned char
set_Redcloud_92xx_mode(Pnl_PanelStat * pstat)
{
int mode;
/* LOOP THROUGH THE AVAILABLE MODES TO FIND A MATCH */
for (mode = 0; mode < NUM_92XX_MODES; mode++) {
if ((FPModeParams[mode].xres == pstat->XRes) &&
(FPModeParams[mode].yres == pstat->YRes) &&
(FPModeParams[mode].bpp == pstat->Depth) &&
(FPModeParams[mode].panel_type == pstat->Type) &&
(FPModeParams[mode].color_type == pstat->MonoColor)) {
/* SET THE 92xx FOR THE SELECTED MODE */
set_Redcloud_92xx_mode_params(mode);
return TRUE;
} /* end if() */
} /* end for() */
return FALSE;
} /* end set_Centaurus_92xx_mode() */
void
Redcloud_9211init(Pnl_PanelStat * pstat)
{
set_Redcloud_92xx_mode(pstat);
}
|