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authorChris Wilson <chris@chris-wilson.co.uk>2010-11-03 18:14:29 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2010-11-03 18:17:17 +0000
commit18839aaec505f8bbdb0690fe694162bf09a87d5c (patch)
tree4331282cf01759d5bd16cda7b2111ff13cab78b6
parent8ff37667bf864b771d16a58fc5041cb48408b6a8 (diff)
Fallback to shadow for Sandybridge if we don't have access to the BLT
If we attempt to emit BLT batches without kernel support, we just end up with EINVAL and no rendering. Prevent this, and avoid uncached rendering, by restoring the shadow fallback paths if there is no BLT support. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--src/intel_driver.c20
1 files changed, 20 insertions, 0 deletions
diff --git a/src/intel_driver.c b/src/intel_driver.c
index fd518999..926c7e31 100644
--- a/src/intel_driver.c
+++ b/src/intel_driver.c
@@ -468,6 +468,24 @@ static void I830XvInit(ScrnInfoPtr scrn)
intel->colorKey);
}
+static Bool can_accelerate_2d(struct intel_screen_private *intel)
+{
+ if (INTEL_INFO(intel)->gen >= 60) {
+ drm_i915_getparam_t gp;
+ int value;
+
+ /* On Sandybridge we need the BLT in order to do anything since
+ * it so frequently used in the acceleration code paths.
+ */
+ gp.value = &value;
+ gp.param = I915_PARAM_HAS_BLT;
+ if (drmIoctl(intel->drmSubFD, DRM_IOCTL_I915_GETPARAM, &gp))
+ return FALSE;
+ }
+
+ return TRUE;
+}
+
/**
* This is called before ScreenInit to do any require probing of screen
* configuration.
@@ -575,6 +593,8 @@ static Bool I830PreInit(ScrnInfoPtr scrn, int flags)
}
intel->use_shadow = FALSE;
+ if (!can_accelerate_2d(intel))
+ intel->use_shadow = TRUE;
if (xf86IsOptionSet(intel->Options, OPTION_SHADOW)) {
intel->use_shadow =