diff options
| author | Jesse Barnes <jbarnes@virtuousgeek.org> | 2012-12-10 14:55:32 -0800 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2012-12-10 14:55:32 -0800 |
| commit | 2ab29a1688cd313768d928e87e145570f35b4a70 (patch) | |
| tree | 67fae83f3ea168955010639087d4df6a46eaf584 | |
| parent | 986e13a56a8544d5b32dbcaacbc0ee9cf5d47e27 (diff) | |
dri2: don't schedule a flip prematurely at ScheduleSwap time
If divisor is 0 but the current MSC is behind the target, we shouldn't
schedule a flip (which will occur at the next vblank) or we'll end up
displaying it early and returning the wrong timestamp.
Preserve the optimization though by allowing us to schedule a flip if
both the divisor is 0 and the current MSC is equal to or ahead of the
target; this avoids a round trip through the kernel.
Reported-by: Mario Kleiner <mario.kleiner@tuebingen.mpg.de>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| -rw-r--r-- | src/intel_dri.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/src/intel_dri.c b/src/intel_dri.c index 25a7b9ec..42b8ee8a 100644 --- a/src/intel_dri.c +++ b/src/intel_dri.c @@ -1230,7 +1230,13 @@ I830DRI2ScheduleSwap(ClientPtr client, DrawablePtr draw, DRI2BufferPtr front, * the swap. */ if (divisor == 0 || current_msc < *target_msc) { - if (flip && I830DRI2ScheduleFlip(intel, draw, swap_info)) + /* + * If we can, schedule the flip directly from here rather + * than waiting for an event from the kernel for the current + * (or a past) MSC. + */ + if (flip && divisor == 0 && current_msc >= *target_msc && + I830DRI2ScheduleFlip(intel, draw, swap_info)) return TRUE; vbl.request.type = |