diff options
author | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-06-26 14:20:05 +0800 |
---|---|---|
committer | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-07-21 11:01:52 +0800 |
commit | a5867a55abca1d16ff57c0e39008e7c7738a724c (patch) | |
tree | 80bff5d51ccf128cec65c08606e425a2a62c7054 | |
parent | 35a40f3df2d8707f61a3f9f0d3357bfe6bd57ed6 (diff) |
xvmc: only allocate memory requiring physical address on 915G
Later 945-ish chipset can use graphics address instead.
(cherry picked from commit d50cec6ef9e2178ea663e58d548390f0f3da7692)
-rw-r--r-- | src/i915_hwmc.c | 23 | ||||
-rw-r--r-- | src/xvmc/i915_xvmc.c | 37 |
2 files changed, 31 insertions, 29 deletions
diff --git a/src/i915_hwmc.c b/src/i915_hwmc.c index 973cabf8..c3451750 100644 --- a/src/i915_hwmc.c +++ b/src/i915_hwmc.c @@ -319,8 +319,8 @@ static Bool i915_allocate_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *c I830Ptr pI830 = I830PTR(pScrn); int flags = ALIGN_BOTH_ENDS; - if (IS_I915G(pI830) || IS_I915GM(pI830) || - IS_I945G(pI830) || IS_I945GM(pI830)) + /* on 915G/GM, load indirect can only use physical address...sigh */ + if (IS_I915G(pI830) || IS_I915GM(pI830)) flags |= NEED_PHYSICAL_ADDR; if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Static Indirect State", @@ -353,14 +353,14 @@ static Bool i915_allocate_xvmc_buffers(ScrnInfoPtr pScrn, I915XvMCContextPriv *c return FALSE; } - if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Correction Data Buffer", + if (!i830_allocate_xvmc_buffer(pScrn, "[XvMC]Correction Data Buffer", &(ctxpriv->mcCorrdata), 512 * 1024, ALIGN_BOTH_ENDS)) { return FALSE; } - if (0) - i830_describe_allocations(pScrn, 1, ""); + if (1) + i830_describe_allocations(pScrn, 1, "i915_mc: "); return TRUE; } @@ -500,29 +500,32 @@ static int i915_xvmc_create_context (ScrnInfoPtr pScrn, XvMCContextPtr pContext, contextRec->sis.handle = ctxpriv->sis_handle; contextRec->sis.offset = ctxpriv->mcStaticIndirectState->offset; contextRec->sis.size = ctxpriv->mcStaticIndirectState->size; - contextRec->sis.bus_addr = ctxpriv->mcStaticIndirectState->bus_addr; contextRec->ssb.handle = ctxpriv->ssb_handle; contextRec->ssb.offset = ctxpriv->mcSamplerState->offset; contextRec->ssb.size = ctxpriv->mcSamplerState->size; - contextRec->ssb.bus_addr = ctxpriv->mcSamplerState->bus_addr; contextRec->msb.handle = ctxpriv->msb_handle; contextRec->msb.offset = ctxpriv->mcMapState->offset; contextRec->msb.size = ctxpriv->mcMapState->size; - contextRec->msb.bus_addr = ctxpriv->mcMapState->bus_addr; contextRec->psp.handle = ctxpriv->psp_handle; contextRec->psp.offset = ctxpriv->mcPixelShaderProgram->offset; contextRec->psp.size = ctxpriv->mcPixelShaderProgram->size; - contextRec->psp.bus_addr = ctxpriv->mcPixelShaderProgram->bus_addr; contextRec->psc.handle = ctxpriv->psc_handle; contextRec->psc.offset = ctxpriv->mcPixelShaderConstants->offset; contextRec->psc.size = ctxpriv->mcPixelShaderConstants->size; - contextRec->psc.bus_addr = ctxpriv->mcPixelShaderConstants->bus_addr; contextRec->corrdata.handle = ctxpriv->corrdata_handle; contextRec->corrdata.offset = ctxpriv->mcCorrdata->offset; contextRec->corrdata.size = ctxpriv->mcCorrdata->size; contextRec->sarea_priv_offset = sizeof(XF86DRISAREARec); contextRec->deviceID = pI830DRI->deviceID; + if (IS_I915G(pI830) || IS_I915GM(pI830)) { + contextRec->sis.bus_addr = ctxpriv->mcStaticIndirectState->bus_addr; + contextRec->ssb.bus_addr = ctxpriv->mcSamplerState->bus_addr; + contextRec->msb.bus_addr = ctxpriv->mcMapState->bus_addr; + contextRec->psp.bus_addr = ctxpriv->mcPixelShaderProgram->bus_addr; + contextRec->psc.bus_addr = ctxpriv->mcPixelShaderConstants->bus_addr; + } + pXvMC->ncontexts++; pXvMC->contexts[i] = pContext->context_id; pXvMC->ctxprivs[i] = ctxpriv; diff --git a/src/xvmc/i915_xvmc.c b/src/xvmc/i915_xvmc.c index f412125f..27d1380e 100644 --- a/src/xvmc/i915_xvmc.c +++ b/src/xvmc/i915_xvmc.c @@ -350,9 +350,9 @@ static void i915_mc_one_time_state_init(XvMCContext *context) psp_state *psp = NULL; psc_state *psc = NULL; i915XvMCContext *pI915XvMC = (i915XvMCContext *)context->privData; - int mem_select = 1; struct i915_3dstate_load_state_immediate_1 *load_state_immediate_1; struct i915_3dstate_load_indirect *load_indirect; + int mem_select; /* 3DSTATE_LOAD_STATE_IMMEDIATE_1 */ one_time_load_state_imm1_size = sizeof(*load_state_immediate_1) + sizeof(*s3) + sizeof(*s6); @@ -398,13 +398,14 @@ static void i915_mc_one_time_state_init(XvMCContext *context) load_indirect->dw0.length = (one_time_load_indirect_size >> 2) - 2; if (pI915XvMC->deviceID == PCI_CHIP_I915_G || - pI915XvMC->deviceID == PCI_CHIP_I915_GM || - pI915XvMC->deviceID == PCI_CHIP_I945_G || - pI915XvMC->deviceID == PCI_CHIP_I945_GM) - mem_select = 0; + pI915XvMC->deviceID == PCI_CHIP_I915_GM) + mem_select = 0; /* use physical address */ + else + mem_select = 1; /* use gfx address */ load_indirect->dw0.mem_select = mem_select; + /* Dynamic indirect state buffer */ dis = (dis_state *)(++load_indirect); dis->dw0.valid = 0; @@ -420,7 +421,7 @@ static void i915_mc_one_time_state_init(XvMCContext *context) if (mem_select) ssb->dw0.buffer_address = (pI915XvMC->ssb.offset >> 2); else - ssb->dw0.buffer_address = (pI915XvMC->ssb.bus_addr >> 2); + ssb->dw0.buffer_address = (pI915XvMC->ssb.bus_addr >> 2); /* Pixel shader program buffer */ psp = (psp_state *)(++ssb); @@ -429,9 +430,9 @@ static void i915_mc_one_time_state_init(XvMCContext *context) psp->dw1.length = 66; /* 4 + 16 + 16 + 31 - 1 */ if (mem_select) - psp->dw0.buffer_address = (pI915XvMC->psp.offset >> 2); + psp->dw0.buffer_address = (pI915XvMC->psp.offset >> 2); else - psp->dw0.buffer_address = (pI915XvMC->psp.bus_addr >> 2); + psp->dw0.buffer_address = (pI915XvMC->psp.bus_addr >> 2); /* Pixel shader constant buffer */ psc = (psc_state *)(++psp); @@ -725,7 +726,7 @@ static void i915_mc_load_indirect_render_init(XvMCContext *context) sis_state *sis; msb_state *msb; struct i915_3dstate_load_indirect *load_indirect; - int mem_select = 1; + int mem_select; mc_render_load_indirect_size = sizeof(*load_indirect) + sizeof(*sis) + sizeof(*msb); @@ -738,10 +739,10 @@ static void i915_mc_load_indirect_render_init(XvMCContext *context) load_indirect->dw0.length = (mc_render_load_indirect_size >> 2) - 2; if (pI915XvMC->deviceID == PCI_CHIP_I915_G || - pI915XvMC->deviceID == PCI_CHIP_I915_GM || - pI915XvMC->deviceID == PCI_CHIP_I945_G || - pI915XvMC->deviceID == PCI_CHIP_I945_GM) + pI915XvMC->deviceID == PCI_CHIP_I915_GM) mem_select = 0; + else + mem_select = 1; load_indirect->dw0.mem_select = mem_select; @@ -752,9 +753,9 @@ static void i915_mc_load_indirect_render_init(XvMCContext *context) sis->dw1.length = 16; /* 4 * 3 + 2 + 3 - 1 */ if (mem_select) - sis->dw0.buffer_address = (pI915XvMC->sis.offset >> 2); + sis->dw0.buffer_address = (pI915XvMC->sis.offset >> 2); else - sis->dw0.buffer_address = (pI915XvMC->sis.bus_addr >> 2); + sis->dw0.buffer_address = (pI915XvMC->sis.bus_addr >> 2); /* Map state buffer (reference buffer info) */ msb = (msb_state *)(++sis); @@ -763,9 +764,9 @@ static void i915_mc_load_indirect_render_init(XvMCContext *context) msb->dw1.length = 23; /* 3 * 8 - 1 */ if (mem_select) - msb->dw0.buffer_address = (pI915XvMC->msb.offset >> 2); + msb->dw0.buffer_address = (pI915XvMC->msb.offset >> 2); else - msb->dw0.buffer_address = (pI915XvMC->msb.bus_addr >> 2); + msb->dw0.buffer_address = (pI915XvMC->msb.bus_addr >> 2); } static void i915_mc_load_indirect_render_emit(void) @@ -1613,9 +1614,7 @@ static Status i915_xvmc_mc_create_context(Display *display, XvMCContext *context pI915XvMC->psc.size = tmpComm->psc.size; if (pI915XvMC->deviceID == PCI_CHIP_I915_G || - pI915XvMC->deviceID == PCI_CHIP_I915_GM || - pI915XvMC->deviceID == PCI_CHIP_I945_G || - pI915XvMC->deviceID == PCI_CHIP_I945_GM) { + pI915XvMC->deviceID == PCI_CHIP_I915_GM) { pI915XvMC->sis.bus_addr = tmpComm->sis.bus_addr; pI915XvMC->ssb.bus_addr = tmpComm->ssb.bus_addr; pI915XvMC->msb.bus_addr = tmpComm->msb.bus_addr; |