diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2010-06-21 22:21:58 +0100 |
|---|---|---|
| committer | Owain G. Ainsworth <oga@openbsd.org> | 2010-06-21 22:40:08 +0100 |
| commit | fb65ede594166b36afb9332651d1ec5460446f4c (patch) | |
| tree | d03dc8d6ebaaa06c7c30fb8c9389f4c55670719d | |
| parent | b2dc9886306066891ed5742adf9841fe3355a87e (diff) | |
i965: Mark the render target as dirty within composite_setup()
The key difference between i965 and earlier, is that the surfaces passed
to the samplers through an indirect table and so the batch and render
target was not being marked dirty by the relocation (since the
relocation only happens within prepare_composite() which may have been
in another batch.) Simply call intel_pixmap_mark_dirty() when binding
the sampler table into the batch to ensure that the dirty is tracked
appropriately.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
(cherry picked from commit 5107b6fa26ecfdbdd60b869a86765c9c484db3a2)
Signed-off-by: Owain G. Ainsworth <oga@openbsd.org>
| -rw-r--r-- | src/i965_render.c | 16 |
1 files changed, 12 insertions, 4 deletions
diff --git a/src/i965_render.c b/src/i965_render.c index 18b0123d..072c86d4 100644 --- a/src/i965_render.c +++ b/src/i965_render.c @@ -1142,6 +1142,12 @@ static void i965_emit_composite_state(ScrnInfoPtr scrn) IntelEmitInvarientState(scrn); intel->last_3d = LAST_3D_RENDER; + /* Mark the destination dirty within this batch */ + intel_batch_mark_pixmap_domains(intel, + i830_uxa_get_pixmap_intel(dest_picture), + I915_GEM_DOMAIN_RENDER, + I915_GEM_DOMAIN_RENDER); + urb_vs_start = 0; urb_vs_size = URB_VS_ENTRIES * URB_VS_ENTRY_SIZE; urb_gs_start = urb_vs_start + urb_vs_size; @@ -1526,6 +1532,12 @@ i965_prepare_composite(int op, PicturePtr source_picture, composite_op->mask_extend = SAMPLER_STATE_EXTEND_NONE; } + /* Flush any pending writes prior to relocating the textures. */ + if(i830_uxa_pixmap_is_dirty(source) || + (mask && i830_uxa_pixmap_is_dirty(mask))) + intel_batch_emit_flush(scrn); + + /* Set up the surface states. */ surface_state_bo = dri_bo_alloc(intel->bufmgr, "surface_state", 3 * sizeof(brw_surface_state_padded), @@ -1658,10 +1670,6 @@ i965_prepare_composite(int op, PicturePtr source_picture, } } - if(i830_uxa_pixmap_is_dirty(source) || - (mask && i830_uxa_pixmap_is_dirty(mask))) - intel_batch_emit_flush(scrn); - intel->needs_render_state_emit = TRUE; return TRUE; |