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authorChris Wilson <chris@chris-wilson.co.uk>2013-12-02 14:20:51 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2013-12-02 17:11:06 +0000
commit6889ba38ab2bb050dec3057dbc584619dbe6d2e2 (patch)
tree983f08dbeb5e801ad63960fdff443e739342a1d0
parent49af22ee5533b1afbf30f50fcfd7245f1c8d98bc (diff)
sna: Drop forced alignment to 64 on pre-gen4 devices
Some linear GPU bo that we create must be naturally aligned, and the extra alignment imposed for pure paranoia is counter productive. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--src/sna/kgem.c6
-rw-r--r--src/sna/kgem.h1
2 files changed, 1 insertions, 6 deletions
diff --git a/src/sna/kgem.c b/src/sna/kgem.c
index 35b76d9c..4305c761 100644
--- a/src/sna/kgem.c
+++ b/src/sna/kgem.c
@@ -1258,10 +1258,6 @@ void kgem_init(struct kgem *kgem, int fd, struct pci_device *dev, unsigned gen)
DBG(("%s: maximum batch size? %d\n", __FUNCTION__,
kgem->batch_size));
- kgem->min_alignment = 4;
- if (gen < 040)
- kgem->min_alignment = 64;
-
kgem->half_cpu_cache_pages = cpu_cache_size() >> 13;
DBG(("%s: last-level cache size: %d bytes, threshold in pages: %d\n",
__FUNCTION__, cpu_cache_size(), kgem->half_cpu_cache_pages));
@@ -1424,7 +1420,7 @@ inline static uint32_t kgem_pitch_alignment(struct kgem *kgem, unsigned flags)
return 256;
if (flags & CREATE_SCANOUT)
return 64;
- return kgem->min_alignment;
+ return 4;
}
void kgem_get_tile_size(struct kgem *kgem, int tiling, int pitch,
diff --git a/src/sna/kgem.h b/src/sna/kgem.h
index d847f3fd..14d7d685 100644
--- a/src/sna/kgem.h
+++ b/src/sna/kgem.h
@@ -158,7 +158,6 @@ struct kgem {
uint16_t nreloc__self;
uint16_t nfence;
uint16_t batch_size;
- uint16_t min_alignment;
uint32_t flush:1;
uint32_t need_expire:1;