diff options
author | Carl Worth <cworth@cworth.org> | 2009-05-21 13:12:52 -0700 |
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committer | Carl Worth <cworth@cworth.org> | 2009-05-26 16:12:17 -0700 |
commit | 8e942b70cb9a784b3f1311affd6fc74c4bcf68bb (patch) | |
tree | d2a5b8061ee5df751f75eca34a6e10b394f681e7 | |
parent | 1a039f4371bec455cad43f0fb7b329f2ee09a974 (diff) |
Revert "Rely on BO pixmaps being present in acceleration paths."
This reverts commit 4653a7db622ad54a3182d93c81331765d930db34.
Eric was getting a little too ambitious about our brave, new world.
We do still want the driver to work with old, non-GEM kernels
after all.
-rw-r--r-- | src/i830_batchbuffer.h | 9 | ||||
-rw-r--r-- | src/i965_render.c | 32 |
2 files changed, 26 insertions, 15 deletions
diff --git a/src/i830_batchbuffer.h b/src/i830_batchbuffer.h index 02834381..4903b8c4 100644 --- a/src/i830_batchbuffer.h +++ b/src/i830_batchbuffer.h @@ -102,9 +102,16 @@ intel_batch_emit_reloc_pixmap(I830Ptr pI830, PixmapPtr pPixmap, uint32_t delta) { dri_bo *bo = i830_get_pixmap_bo(pPixmap); + uint32_t offset; assert(pI830->batch_ptr != NULL); assert(intel_batch_space(pI830) >= 4); - intel_batch_emit_reloc(pI830, bo, read_domains, write_domain, delta); + if (bo) { + intel_batch_emit_reloc(pI830, bo, read_domains, write_domain, delta); + return; + } + offset = intel_get_pixmap_offset(pPixmap); + *(uint32_t *)(pI830->batch_ptr + pI830->batch_used) = offset + delta; + pI830->batch_used += 4; } #define OUT_BATCH(dword) intel_batch_emit_dword(pI830, dword) diff --git a/src/i965_render.c b/src/i965_render.c index 7583af17..e527f11c 100644 --- a/src/i965_render.c +++ b/src/i965_render.c @@ -923,7 +923,6 @@ i965_set_picture_surface_state(dri_bo *ss_bo, int ss_index, struct brw_surface_state_padded *ss; struct brw_surface_state local_ss; dri_bo *pixmap_bo = i830_get_pixmap_bo(pPixmap); - uint32_t write_domain, read_domains; ss = (struct brw_surface_state_padded *)ss_bo->virtual + ss_index; @@ -953,7 +952,10 @@ i965_set_picture_surface_state(dri_bo *ss_bo, int ss_index, local_ss.ss0.vert_line_stride_ofs = 0; local_ss.ss0.mipmap_layout_mode = 0; local_ss.ss0.render_cache_read_mode = 0; - local_ss.ss1.base_addr = pixmap_bo->offset; + if (pixmap_bo != NULL) + local_ss.ss1.base_addr = pixmap_bo->offset; + else + local_ss.ss1.base_addr = intel_get_pixmap_offset(pPixmap); local_ss.ss2.mip_count = 0; local_ss.ss2.render_target_rotation = 0; @@ -965,20 +967,22 @@ i965_set_picture_surface_state(dri_bo *ss_bo, int ss_index, memcpy(ss, &local_ss, sizeof(local_ss)); + if (pixmap_bo != NULL) { + uint32_t write_domain, read_domains; - if (is_dst) { - write_domain = I915_GEM_DOMAIN_RENDER; - read_domains = I915_GEM_DOMAIN_RENDER; - } else { - write_domain = 0; - read_domains = I915_GEM_DOMAIN_SAMPLER; + if (is_dst) { + write_domain = I915_GEM_DOMAIN_RENDER; + read_domains = I915_GEM_DOMAIN_RENDER; + } else { + write_domain = 0; + read_domains = I915_GEM_DOMAIN_SAMPLER; + } + dri_bo_emit_reloc(ss_bo, read_domains, write_domain, + 0, + ss_index * sizeof(*ss) + + offsetof(struct brw_surface_state, ss1), + pixmap_bo); } - drm_intel_bo_emit_reloc(ss_bo, - ss_index * sizeof(*ss) + - offsetof(struct brw_surface_state, ss1), - pixmap_bo, - 0, - read_domains, write_domain); } static void |