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authorWang Zhenyu <zhenyu.z.wang@intel.com>2006-11-29 16:30:53 +0800
committerWang Zhenyu <zhenyu.z.wang@intel.com>2006-11-29 16:30:53 +0800
commitb6eba96584bcd2c024f6443d9f3728eb65b234fb (patch)
tree0a6f475cef25c3071adcf0a28dc69e58f66df04f
parent453842c9ff733af45fa665d9db6a35164f45c60a (diff)
fix vertex buffer size
-rw-r--r--src/i965_exa_render.c8
1 files changed, 2 insertions, 6 deletions
diff --git a/src/i965_exa_render.c b/src/i965_exa_render.c
index 9127d655..94eabfbe 100644
--- a/src/i965_exa_render.c
+++ b/src/i965_exa_render.c
@@ -233,16 +233,12 @@ Bool
I965EXACheckComposite(int op, PicturePtr pSrcPicture, PicturePtr pMaskPicture,
PicturePtr pDstPicture)
{
- /* check op*/
- /* check op with mask's componentAlpha*/
- /* check textures */
- /* check dst buffer format */
CARD32 tmp1;
/* Check for unsupported compositing operations. */
if (op >= sizeof(I965BlendOp) / sizeof(I965BlendOp[0]))
I830FALLBACK("Unsupported Composite op 0x%x\n", op);
-
+
if (pMaskPicture != NULL && pMaskPicture->componentAlpha) {
/* Check if it's component alpha that relies on a source alpha and on
* the source value. We can only get one of those into the single
@@ -305,7 +301,7 @@ int next_offset, total_state_size;
char *state_base;
int state_base_offset;
float *vb;
-int vb_size = 4 * 4 ; /* 4 DWORDS per vertex, 4 vertices for TRIFAN*/
+int vb_size = (4 * 4) * 4 ; /* 4 DWORDS per vertex*/
CARD32 src_blend, dst_blend;