diff options
author | Chris Wilson <chris@chris-wilson.co.uk> | 2012-09-05 12:33:08 +0100 |
---|---|---|
committer | Chris Wilson <chris@chris-wilson.co.uk> | 2012-09-05 12:33:08 +0100 |
commit | 6211d0914e2ed1cdd4cc2e170ee16129fc9f0d73 (patch) | |
tree | 838386e83bcd78fb4ab398506f2ee05ad3bbdbb8 | |
parent | 6a1423547769c24d15f6475628981d14a76a4bb2 (diff) |
uxa: Flush batch immediately after queuing a WAIT_FOR_EVENT
We still encounter hangs with kernel-3.5 with the culprit being a wait
on a disabled pipe. As we thoroughly check before that the pipe is still
disabled and flush before a modeset, the only possibility that remains
is that DPMS is disabling the pipe before we submit. Close that race by
always submitting the batch immediately after a WAIT_FOR_EVENT.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r-- | src/intel_dri.c | 5 | ||||
-rw-r--r-- | src/intel_video.c | 5 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/intel_dri.c b/src/intel_dri.c index fa1660ca..a1bac9a8 100644 --- a/src/intel_dri.c +++ b/src/intel_dri.c @@ -540,6 +540,11 @@ I830DRI2CopyRegion(DrawablePtr drawable, RegionPtr pRegion, 0, 0); FreeScratchGC(gc); + + /* And make sure the WAIT_FOR_EVENT is queued before any + * modesetting/dpms operations on the pipe. + */ + intel_batch_submit(scrn); } #if DRI2INFOREC_VERSION >= 4 diff --git a/src/intel_video.c b/src/intel_video.c index 0be72e20..09782aa5 100644 --- a/src/intel_video.c +++ b/src/intel_video.c @@ -1585,6 +1585,11 @@ I830PutImageTextured(ScrnInfoPtr scrn, intel_get_screen_private(scrn)->needs_flush = TRUE; DamageDamageRegion(drawable, clipBoxes); + /* And make sure the WAIT_FOR_EVENT is queued before any + * modesetting/dpms operations on the pipe. + */ + intel_batch_submit(scrn); + return Success; } |