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authorWang Zhenyu <zhenyu.z.wang@intel.com>2006-12-04 15:47:31 +0800
committerKeith Packard <keithp@neko.keithp.com>2007-01-06 14:37:31 -0800
commit5c461063cde68092e778c44ac6abd9129cd8019e (patch)
treebb086a7fffb9afa187006e9c8fc5b1f357930c30
parent89a42d489bd370b89e5ff4e01f026b4d64723cd8 (diff)
[PATCH] fix typo in ps kernel
fix corrupt in some subspans Signed-off-by: Keith Packard <keithp@neko.keithp.com>
-rw-r--r--src/exa_wm_masknoca.g4a8
-rw-r--r--src/exa_wm_masknoca_prog.h8
2 files changed, 8 insertions, 8 deletions
diff --git a/src/exa_wm_masknoca.g4a b/src/exa_wm_masknoca.g4a
index 195203c5..c2049fdb 100644
--- a/src/exa_wm_masknoca.g4a
+++ b/src/exa_wm_masknoca.g4a
@@ -51,10 +51,10 @@ mov (1) g8.20<1>F g1.14<0,1,0>UW { align1 };
add (1) g8.24<1>F g1.14<0,1,0>UW 1UB { align1 };
add (1) g8.28<1>F g1.14<0,1,0>UW 1UB { align1 };
/* Set up ss2.x coordinates */
-mov (1) g9<1>F g1.16<0,1,0>UW { align1 };
-add (1) g9.4<1>F g1.16<0,1,0>UW 1UB { align1 };
-mov (1) g9.8<1>F g1.16<0,1,0>UW { align1 };
-add (1) g9.12<1>F g1.16<0,1,0>UW 1UB { align1 };
+mov (1) g7<1>F g1.16<0,1,0>UW { align1 };
+add (1) g7.4<1>F g1.16<0,1,0>UW 1UB { align1 };
+mov (1) g7.8<1>F g1.16<0,1,0>UW { align1 };
+add (1) g7.12<1>F g1.16<0,1,0>UW 1UB { align1 };
/* Set up ss2.y coordinates */
mov (1) g9<1>F g1.18<0,1,0>UW { align1 };
mov (1) g9.4<1>F g1.18<0,1,0>UW { align1 };
diff --git a/src/exa_wm_masknoca_prog.h b/src/exa_wm_masknoca_prog.h
index 66eb960d..5fcf3b52 100644
--- a/src/exa_wm_masknoca_prog.h
+++ b/src/exa_wm_masknoca_prog.h
@@ -14,10 +14,10 @@
{ 0x00000001, 0x2114013d, 0x0000002e, 0x00000000 },
{ 0x00000040, 0x21180d3d, 0x0000002e, 0x00000001 },
{ 0x00000040, 0x211c0d3d, 0x0000002e, 0x00000001 },
- { 0x00000001, 0x2120013d, 0x00000030, 0x00000000 },
- { 0x00000040, 0x21240d3d, 0x00000030, 0x00000001 },
- { 0x00000001, 0x2128013d, 0x00000030, 0x00000000 },
- { 0x00000040, 0x212c0d3d, 0x00000030, 0x00000001 },
+ { 0x00000001, 0x20e0013d, 0x00000030, 0x00000000 },
+ { 0x00000040, 0x20e40d3d, 0x00000030, 0x00000001 },
+ { 0x00000001, 0x20e8013d, 0x00000030, 0x00000000 },
+ { 0x00000040, 0x20ec0d3d, 0x00000030, 0x00000001 },
{ 0x00000001, 0x2120013d, 0x00000032, 0x00000000 },
{ 0x00000001, 0x2124013d, 0x00000032, 0x00000000 },
{ 0x00000040, 0x21280d3d, 0x00000032, 0x00000001 },