diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2009-12-13 09:33:45 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2010-01-08 19:21:31 +0000 |
| commit | 7a2b7cfab5cdef277f0feb838683422d9fcb0db3 (patch) | |
| tree | 9aeb107697bbf3b99a571247e9a5d89ec28a5bcd | |
| parent | 229d23fb18d696fb7ad476ce335be14ec9811bd3 (diff) | |
Consolidate determining maximum sizes for use with GEM
Add a small wrapper function so that the callsites need only call the
single function when checking the available aperture size for
determining the maximum viable size for operations. This will allow us
to easily extend this set in the future by only needing to adding the
check to a single location.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
| -rw-r--r-- | src/drmmode_display.c | 3 | ||||
| -rw-r--r-- | src/i830.h | 3 | ||||
| -rw-r--r-- | src/i830_memory.c | 16 |
3 files changed, 12 insertions, 10 deletions
diff --git a/src/drmmode_display.c b/src/drmmode_display.c index a469f6ca..b1dee76c 100644 --- a/src/drmmode_display.c +++ b/src/drmmode_display.c @@ -395,8 +395,7 @@ drmmode_set_mode_major(xf86CrtcPtr crtc, DisplayModePtr mode, drmmode_output_dpms(output, DPMSModeOn); } - i830_set_max_gtt_map_size(scrn); - i830_set_max_tiling_size(scrn); + i830_set_gem_max_sizes(scrn); if (scrn->pScreen) xf86_reload_cursors(scrn->pScreen); @@ -466,8 +466,7 @@ Bool i830_bind_all_memory(ScrnInfoPtr scrn); unsigned long i830_get_fence_size(intel_screen_private *intel, unsigned long size); unsigned long i830_get_fence_pitch(intel_screen_private *intel, unsigned long pitch, uint32_t tiling_mode); -void i830_set_max_gtt_map_size(ScrnInfoPtr scrn); -void i830_set_max_tiling_size(ScrnInfoPtr scrn); +void i830_set_gem_max_sizes(ScrnInfoPtr scrn); i830_memory *i830_allocate_framebuffer(ScrnInfoPtr scrn); diff --git a/src/i830_memory.c b/src/i830_memory.c index 7abea723..79c9fa71 100644 --- a/src/i830_memory.c +++ b/src/i830_memory.c @@ -523,8 +523,7 @@ i830_memory *i830_allocate_framebuffer(ScrnInfoPtr scrn) return NULL; } - i830_set_max_gtt_map_size(scrn); - i830_set_max_tiling_size(scrn); + i830_set_gem_max_sizes(scrn); return front_buffer; } @@ -594,8 +593,7 @@ Bool i830_bind_all_memory(ScrnInfoPtr scrn) drmmode_crtc_set_cursor_bo(xf86_config->crtc[i], intel->cursor_mem_argb[i]->bo); - i830_set_max_gtt_map_size(scrn); - i830_set_max_tiling_size(scrn); + i830_set_gem_max_sizes(scrn); if (intel->front_buffer) scrn->fbOffset = intel->front_buffer->offset; @@ -644,7 +642,7 @@ void i830_free_xvmc_buffer(ScrnInfoPtr scrn, i830_memory * buffer) #endif -void i830_set_max_gtt_map_size(ScrnInfoPtr scrn) +static void i830_set_max_gtt_map_size(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct drm_i915_gem_get_aperture aperture; @@ -665,7 +663,7 @@ void i830_set_max_gtt_map_size(ScrnInfoPtr scrn) } } -void i830_set_max_tiling_size(ScrnInfoPtr scrn) +static void i830_set_max_tiling_size(ScrnInfoPtr scrn) { intel_screen_private *intel = intel_get_screen_private(scrn); struct drm_i915_gem_get_aperture aperture; @@ -685,3 +683,9 @@ void i830_set_max_tiling_size(ScrnInfoPtr scrn) intel->max_tiling_size /= 2; } } + +void i830_set_gem_max_sizes(ScrnInfoPtr scrn) +{ + i830_set_max_gtt_map_size(scrn); + i830_set_max_tiling_size(scrn); +} |