Merge branch 'modesetting-origin' into modesetting

20 files changed, 1067 insertions, 580 deletions

diff --git a/configure.ac b/configure.ac
index 70ae8078..d45185ae 100644
--- a/configure.ac
+++ b/configure.ac
@@ -21,10 +21,10 @@
 # Process this file with autoconf to produce a configure script
 
 AC_PREREQ(2.57)
-AC_INIT([xf86-video-i810],
+AC_INIT([xf86-video-intel],
         1.7.2,
         [https://bugs.freedesktop.org/enter_bug.cgi?product=xorg],
-        xf86-video-i810)
+        xf86-video-intel)
 
 AC_DEFINE_UNQUOTED([INTEL_VERSION_MAJOR],
 		   [$(echo $PACKAGE_VERSION | sed -e 's/^\([[0-9]]\)\.[[0-9]]\.[[0-9]]/\1/')],
@@ -139,7 +139,7 @@ AC_SUBST([XORG_CFLAGS])
 AC_SUBST([WARN_CFLAGS])
 AC_SUBST([moduledir])
 
-DRIVER_NAME=i810
+DRIVER_NAME=intel
 AC_SUBST([DRIVER_NAME])
 
 XORG_MANPAGE_SECTIONS
diff --git a/man/i810.man b/man/intel.man
index 2215c7a4..b932632c 100644
--- a/man/i810.man
+++ b/man/intel.man
@@ -1,19 +1,18 @@
-.\" $XFree86: xc/programs/Xserver/hw/xfree86/drivers/i810/i810.man,v 1.5 2003/10/18 02:27:07 dawes Exp $ 
 .\" shorthand for double quote that works everywhere.
 .ds q \N'34'
-.TH I810 __drivermansuffix__ __vendorversion__
+.TH intel  __drivermansuffix__ __vendorversion__
 .SH NAME
-i810 \- Intel 8xx integrated graphics chipsets
+intel \- Intel integrated graphics chipsets
 .SH SYNOPSIS
 .nf
 .B "Section \*qDevice\*q"
 .BI "  Identifier \*q"  devname \*q
-.B  "  Driver \*qi810\*q"
+.B  "  Driver \*qintel\*q"
 \ \ ...
 .B EndSection
 .fi
 .SH DESCRIPTION
-.B i810
+.B intel
 is an __xservername__ driver for Intel integrated graphics chipsets.
 The driver supports depths 8, 15, 16 and 24.  All visual types are
 supported in depth 8.  For the i810/i815 other depths support the
@@ -23,7 +22,7 @@ supports hardware accelerated 3D via the Direct Rendering Infrastructure
 (DRI), but only in depth 16 for the i810/i815 and depths 16 and 24 for
 the 830M and later.
 .SH SUPPORTED HARDWARE
-.B i810
+.B intel
 supports the i810, i810-DC100, i810e, i815, i830M, 845G, 852GM, 855GM,
 865G, 915G, 915GM, 945G, 945GM, 965G, 965Q and 946GZ chipsets.
 
@@ -58,11 +57,6 @@ reduce performance for 3D applications.  Note however, that increasing
 this value too much will reduce the amount of system memory available
 for other applications.
 .PP
-The driver makes use of the video BIOS to program video modes for the 830M
-and later.  This limits the video modes that can be used to those provided
-by the video BIOS, and to those that will fit into the amount of video memory
-that the video BIOS is aware of.
-.PP
 The following driver
 .B Options
 are supported
@@ -179,6 +173,7 @@ Jeff Hartmann, Mark Vojkovich, Alan Hourihane, H. J. Lu.  830M and 845G
 support reworked for XFree86 4.3 by David Dawes and Keith Whitwell.  852GM,
 855GM, and 865G support added by David Dawes and Keith Whitwell.  915G,
 915GM, 945G, 945GM, 965G, 965Q and 946GZ support added by Alan Hourihane and
-Keith Whitwell.  Dual Head, Clone and lid status support added by Alan
-Hourihane. Textured video support for 915G and later chips added by Keith
-Packard and Eric Anholt.
+Keith Whitwell. Lid status support added by Alan Hourihane. Textured video
+support for 915G and later chips, RandR 1.2 and hardware modesetting added
+by Eric Anholt and Keith Packard. EXA and Render acceleration added by Wang
+Zhenyu. TV out support added by Zou Nan Hai and Keith Packard.
diff --git a/src/Makefile.am b/src/Makefile.am
index 7656e02e..6c63cc41 100644
--- a/src/Makefile.am
+++ b/src/Makefile.am
@@ -28,11 +28,11 @@ SUBDIRS = xvmc bios_reader ch7017 ch7xxx ivch sil164
 AM_CFLAGS = @WARN_CFLAGS@ @XORG_CFLAGS@ @DRI_CFLAGS@ \
 	-DI830_XV -DI830_USE_XAA -DI830_USE_EXA
 
-i810_drv_la_LTLIBRARIES = i810_drv.la
-i810_drv_la_LDFLAGS = -module -avoid-version
-i810_drv_ladir = @moduledir@/drivers
+intel_drv_la_LTLIBRARIES = intel_drv.la
+intel_drv_la_LDFLAGS = -module -avoid-version
+intel_drv_ladir = @moduledir@/drivers
 
-i810_drv_la_SOURCES = \
+intel_drv_la_SOURCES = \
          brw_defines.h \
          brw_structs.h \
 	 sf_prog.h \
@@ -94,7 +94,16 @@ i810_drv_la_SOURCES = \
 	 i830_xaa.c \
 	 i830_render.c \
 	 i915_render.c \
-	 i965_render.c
+	 i965_render.c \
+	 i830_xf86Rename.h \
+	 local_xf86Rename.h \
+	 xf86Parser.h \
+	 xf86Optrec.h \
+	 i830_randr.h
+
+EXTRA_DIST = \
+	packed_yuv_sf.g4a \
+	packed_yuv_wm.g4a
 
 if HAVE_GEN4ASM
 sf_prog.h: packed_yuv_sf.g4a
@@ -109,10 +118,18 @@ exa_wm_nomask_prog.h: exa_wm_nomask.g4a
 	intel-gen4asm -o exa_wm_nomask_prog.h exa_wm_nomask.g4a
 exa_wm_masknoca_prog.h: exa_wm_masknoca.g4a
 	intel-gen4asm -o exa_wm_masknoca_prog.h exa_wm_masknoca.g4a
+else
+EXTRA_DIST += \
+	sf_prog.h		\
+	wm_prog.h 		\
+	exa_sf_prog.h 		\
+	exa_sf_mask_prog.h	\
+	exa_wm_nomask_prog.h 	\
+	exa_wm_masknoca_prog.h
 endif
 
 if DRI
-i810_drv_la_SOURCES += \
+intel_drv_la_SOURCES += \
          i810_dri.c \
          i810_dri.h \
          i830_dri.c \
@@ -120,6 +137,9 @@ i810_drv_la_SOURCES += \
          i830_dri.h 
 endif
 
-EXTRA_DIST = \
-	packed_yuv_sf.g4a \
-	packed_yuv_wm.g4a
+install-data-local: install-intel_drv_laLTLIBRARIES
+	(cd $(DESTDIR)$(intel_drv_ladir) && rm -f i810_drv.so && ln -s intel_drv.so i810_drv.so)
+
+uninstall-local:
+	(cd $(DESTDIR)$(intel_drv_ladir) && rm -f i810_drv.so)
+	
diff --git a/src/exa_sf_mask.g4a b/src/exa_sf_mask.g4a
index ab519cee..a7e2d324 100644
--- a/src/exa_sf_mask.g4a
+++ b/src/exa_sf_mask.g4a
@@ -22,25 +22,25 @@ mul (1) g7<1>F g7<0,1,0>F g6<0,1,0>F { align1 };
 /* Cy[0] */
 mul (1) g7.4<1>F g7.4<0,1,0>F g6.4<0,1,0>F { align1 };
 /* Cx[2] */
-mul (1) g7.16<1>F g7.16<0,1,0>F g6<0,1,0>F { align1 };
+mul (1) g7.8<1>F g7.8<0,1,0>F g6<0,1,0>F { align1 };
 /* Cy[2] */
-mul (1) g7.20<1>F g7.20<0,1,0>F g6.4<0,1,0>F { align1 };
+mul (1) g7.12<1>F g7.12<0,1,0>F g6.4<0,1,0>F { align1 };
 
 /* src Cx[0], Cx[1] */
 mov (8) m1<1>F g7<0,1,0>F { align1 };
 /* mask Cx[2], Cx[3] */
-mov (1) m1.8<1>F g7.16<0,1,0>F { align1 };
-mov (1) m1.12<1>F g7.16<0,1,0>F { align1 };
+mov (1) m1.8<1>F g7.8<0,1,0>F { align1 };
+mov (1) m1.12<1>F g7.8<0,1,0>F { align1 };
 /* src Cy[0], Cy[1] */
 mov (8) m2<1>F g7.4<0,1,0>F { align1 };
 /* mask Cy[2], Cy[3] */
-mov (1) m2.8<1>F g7.20<0,1,0>F { align1 };
-mov (1) m2.12<1>F g7.20<0,1,0>F { align1 };
+mov (1) m2.8<1>F g7.12<0,1,0>F { align1 };
+mov (1) m2.12<1>F g7.12<0,1,0>F { align1 };
 /* src Co[0], Co[1] */
 mov (8) m3<1>F g3<8,8,1>F { align1 };
 /* mask Co[2], Co[3] */
-mov (1) m3.8<1>F g3.16<0,1,0>F { align1 };
-mov (1) m3.12<1>F g3.20<0,1,0>F { align1 };
+mov (1) m3.8<1>F g3.8<0,1,0>F { align1 };
+mov (1) m3.12<1>F g3.12<0,1,0>F { align1 };
 
 send (8) 0 null g0<8,8,1>F urb 0 transpose used complete mlen 4 rlen 0 { align1 EOT };
 nop;
diff --git a/src/exa_sf_mask_prog.h b/src/exa_sf_mask_prog.h
index cd7f460a..4e9114d6 100644
--- a/src/exa_sf_mask_prog.h
+++ b/src/exa_sf_mask_prog.h
@@ -3,17 +3,17 @@
    { 0x00600040, 0x20e077bd, 0x008d0080, 0x008d4060 },
    { 0x00000041, 0x20e077bd, 0x000000e0, 0x000000c0 },
    { 0x00000041, 0x20e477bd, 0x000000e4, 0x000000c4 },
-   { 0x00000041, 0x20f077bd, 0x000000f0, 0x000000c0 },
-   { 0x00000041, 0x20f477bd, 0x000000f4, 0x000000c4 },
+   { 0x00000041, 0x20e877bd, 0x000000e8, 0x000000c0 },
+   { 0x00000041, 0x20ec77bd, 0x000000ec, 0x000000c4 },
    { 0x00600001, 0x202003be, 0x000000e0, 0x00000000 },
-   { 0x00000001, 0x202803be, 0x000000f0, 0x00000000 },
-   { 0x00000001, 0x202c03be, 0x000000f0, 0x00000000 },
+   { 0x00000001, 0x202803be, 0x000000e8, 0x00000000 },
+   { 0x00000001, 0x202c03be, 0x000000e8, 0x00000000 },
    { 0x00600001, 0x204003be, 0x000000e4, 0x00000000 },
-   { 0x00000001, 0x204803be, 0x000000f4, 0x00000000 },
-   { 0x00000001, 0x204c03be, 0x000000f4, 0x00000000 },
+   { 0x00000001, 0x204803be, 0x000000ec, 0x00000000 },
+   { 0x00000001, 0x204c03be, 0x000000ec, 0x00000000 },
    { 0x00600001, 0x206003be, 0x008d0060, 0x00000000 },
-   { 0x00000001, 0x206803be, 0x00000070, 0x00000000 },
-   { 0x00000001, 0x206c03be, 0x00000074, 0x00000000 },
+   { 0x00000001, 0x206803be, 0x00000068, 0x00000000 },
+   { 0x00000001, 0x206c03be, 0x0000006c, 0x00000000 },
    { 0x00600031, 0x20001fbc, 0x008d0000, 0x8640c800 },
    { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
    { 0x0000007e, 0x00000000, 0x00000000, 0x00000000 },
diff --git a/src/i810.h b/src/i810.h
index 852a64a9..614de52c 100644
--- a/src/i810.h
+++ b/src/i810.h
@@ -62,8 +62,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
 #include "common.h"
 
 #define I810_VERSION 4000
-#define I810_NAME "I810"
-#define I810_DRIVER_NAME "i810"
+#define I810_NAME "intel"
+#define I810_DRIVER_NAME "intel"
+#define I810_LEGACY_DRIVER_NAME "i810"
 
 /* HWMC Surfaces */
 #define I810_MAX_SURFACES 7
diff --git a/src/i810_driver.c b/src/i810_driver.c
index e7c85071..04166b78 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -384,6 +384,21 @@ int I830EntityIndex = -1;
 
 static MODULESETUPPROTO(i810Setup);
 
+static XF86ModuleVersionInfo intelVersRec = {
+   "intel",
+   MODULEVENDORSTRING,
+   MODINFOSTRING1,
+   MODINFOSTRING2,
+   XORG_VERSION_CURRENT,
+   INTEL_VERSION_MAJOR, INTEL_VERSION_MINOR, INTEL_VERSION_PATCH,
+   ABI_CLASS_VIDEODRV,
+   ABI_VIDEODRV_VERSION,
+   MOD_CLASS_VIDEODRV,
+   {0, 0, 0, 0}
+};
+
+_X_EXPORT XF86ModuleData intelModuleData = { &intelVersRec, i810Setup, NULL };
+
 static XF86ModuleVersionInfo i810VersRec = {
    "i810",
    MODULEVENDORSTRING,
@@ -521,7 +536,9 @@ I810Probe(DriverPtr drv, int flags)
     * driver, and return if there are none.
     */
    if ((numDevSections =
-	xf86MatchDevice(I810_DRIVER_NAME, &devSections)) <= 0) {
+	xf86MatchDevice(I810_DRIVER_NAME, &devSections)) <= 0 &&
+       (numDevSections =
+	xf86MatchDevice(I810_LEGACY_DRIVER_NAME, &devSections)) <= 0) {
       return FALSE;
    }
 
diff --git a/src/i830.h b/src/i830.h
index 42933f92..96972eb5 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -232,21 +232,6 @@ enum last_3d {
     LAST_3D_ROTATION
 };
 
-#if 0
-typedef struct _I830PipeRec {
-   Bool		  enabled;
-   int		  x;
-   int		  y;
-   Bool		  cursorInRange;
-   Bool		  cursorShown;
-   DisplayModeRec curMode;
-   DisplayModeRec desiredMode;
-#ifdef RANDR_12_INTERFACE
-   RRCrtcPtr	  randr_crtc;
-#endif
-} I830PipeRec, *I830PipePtr;
-#endif
-
 typedef struct _I830Rec {
    unsigned char *MMIOBase;
    unsigned char *FbBase;
@@ -605,6 +590,9 @@ extern Bool I830I2CInit(ScrnInfoPtr pScrn, I2CBusPtr *bus_ptr, int i2c_reg,
 /* return a mask of output indices matching outputs against type_mask */
 int i830_output_clones (ScrnInfoPtr pScrn, int type_mask);
 
+/* i830_bios.c */
+DisplayModePtr i830_bios_get_panel_mode(ScrnInfoPtr pScrn);
+
 /* i830_display.c */
 Bool
 i830PipeHasType (xf86CrtcPtr crtc, int type);
diff --git a/src/i830_bios.c b/src/i830_bios.c
index a9ef474d..cb886b54 100644
--- a/src/i830_bios.c
+++ b/src/i830_bios.c
@@ -122,8 +122,16 @@ i830GetBIOS(ScrnInfoPtr pScrn)
     return bios;
 }
 
-Bool
-i830GetLVDSInfoFromBIOS(ScrnInfoPtr pScrn)
+/**
+ * Returns the BIOS's fixed panel mode.
+ *
+ * Note that many BIOSes will have the appropriate tables for a panel even when
+ * a panel is not attached.  Additionally, many BIOSes adjust table sizes or
+ * offsets, such that this parsing fails.  Thus, almost any other method for
+ * detecting the panel mode is preferable.
+ */
+DisplayModePtr
+i830_bios_get_panel_mode(ScrnInfoPtr pScrn)
 {
     I830Ptr pI830 = I830PTR(pScrn);
     struct vbt_header *vbt;
@@ -131,12 +139,11 @@ i830GetLVDSInfoFromBIOS(ScrnInfoPtr pScrn)
     int vbt_off, bdb_off, bdb_block_off, block_size;
     int panel_type = -1;
     unsigned char *bios;
-    Bool found_panel_info = FALSE;
 
     bios = i830GetBIOS(pScrn);
 
     if (bios == NULL)
-	return FALSE;
+	return NULL;
 
     vbt_off = INTEL_BIOS_16(0x1a);
     vbt = (struct vbt_header *)(bios + vbt_off);
@@ -146,7 +153,7 @@ i830GetLVDSInfoFromBIOS(ScrnInfoPtr pScrn)
     if (memcmp(bdb->signature, "BIOS_DATA_BLOCK ", 16) != 0) {
 	xf86DrvMsg(pScrn->scrnIndex, X_ERROR, "Bad BDB signature\n");
 	xfree(bios);
-	return FALSE;
+	return NULL;
     }
 
     for (bdb_block_off = bdb->header_size; bdb_block_off < bdb->bdb_size;
@@ -163,7 +170,6 @@ i830GetLVDSInfoFromBIOS(ScrnInfoPtr pScrn)
 
 	id = INTEL_BIOS_8(start);
 	block_size = INTEL_BIOS_16(start + 1) + 3;
-	xf86DrvMsg(pScrn->scrnIndex, X_INFO, "Found BDB block type %d\n", id);
 	switch (id) {
 	case 40:
 	    lvds1 = (struct lvds_bdb_1 *)(bios + start);
@@ -227,13 +233,11 @@ i830GetLVDSInfoFromBIOS(ScrnInfoPtr pScrn)
 		       "Found panel mode in BIOS VBT tables:\n");
 	    xf86PrintModeline(pScrn->scrnIndex, fixed_mode);
 
-	    pI830->panel_fixed_mode = fixed_mode;
-
-	    found_panel_info = TRUE;
-	    break;
+	    xfree(bios);
+	    return fixed_mode;
 	}
     }
 
     xfree(bios);
-    return found_panel_info;
+    return NULL;
 }
diff --git a/src/i830_bios.h b/src/i830_bios.h
index 9bd0db8a..881d5c86 100644
--- a/src/i830_bios.h
+++ b/src/i830_bios.h
@@ -114,6 +114,3 @@ struct lvds_bdb_2 {
     CARD8 table_size;	/* not sure on this one */
     struct lvds_bdb_2_entry panels[16];
 } __attribute__((packed));
-
-Bool
-i830GetLVDSInfoFromBIOS(ScrnInfoPtr pScrn);
diff --git a/src/i830_display.c b/src/i830_display.c
index 82029850..345eea9f 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -1132,6 +1132,91 @@ i830ReleaseLoadDetectPipe(xf86OutputPtr output)
     }
 }
 
+/* Returns the clock of the currently programmed mode of the given pipe. */
+static int
+i830_crtc_clock_get(ScrnInfoPtr pScrn, xf86CrtcPtr crtc)
+{
+    I830Ptr pI830 = I830PTR(pScrn);
+    I830CrtcPrivatePtr	intel_crtc = crtc->driver_private;
+    int pipe = intel_crtc->pipe;
+    CARD32 dpll = INREG((pipe == 0) ? DPLL_A : DPLL_B);
+    CARD32 fp;
+    intel_clock_t clock;
+
+    if ((dpll & DISPLAY_RATE_SELECT_FPA1) == 0)
+	fp = INREG((pipe == 0) ? FPA0 : FPB0);
+    else
+	fp = INREG((pipe == 0) ? FPA1 : FPB1);
+
+    clock.m1 = (fp & FP_M1_DIV_MASK) >> FP_M1_DIV_SHIFT;
+    clock.m2 = (fp & FP_M2_DIV_MASK) >> FP_M2_DIV_SHIFT;
+    clock.n = (fp & FP_N_DIV_MASK) >> FP_N_DIV_SHIFT;
+    clock.p1 = ffs((dpll & DPLL_FPA01_P1_POST_DIV_MASK) >>
+		   DPLL_FPA01_P1_POST_DIV_SHIFT);
+    switch (dpll & DPLL_MODE_MASK) {
+    case DPLLB_MODE_DAC_SERIAL:
+	clock.p2 = dpll & DPLL_DAC_SERIAL_P2_CLOCK_DIV_5 ? 5 : 10;
+	break;
+    case DPLLB_MODE_LVDS:
+	clock.p2 = dpll & DPLLB_LVDS_P2_CLOCK_DIV_7 ? 7 : 14;
+	break;
+    default:
+	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		   "Unknown DPLL mode %08x in programmed mode\n",
+		   (int)(dpll & DPLL_MODE_MASK));
+	return 0;
+    }
+    
+    /* XXX: Handle the 100Mhz refclk */
+    if (IS_I9XX(pI830))
+	i9xx_clock(96000, &clock);
+    else
+	i9xx_clock(48000, &clock);
+
+    if (!i830PllIsValid(crtc, &clock)) {
+	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		   "Bad clock found programmed in pipe %c\n",
+		   pipe == 0 ? 'A' : 'B');
+	i830PrintPll("", &clock);
+    }
+
+    return clock.dot;
+}
+
+/** Returns the currently programmed mode of the given pipe. */
+DisplayModePtr
+i830_crtc_mode_get(ScrnInfoPtr pScrn, xf86CrtcPtr crtc)
+{
+    I830Ptr pI830 = I830PTR(pScrn);
+    I830CrtcPrivatePtr	intel_crtc = crtc->driver_private;
+    int pipe = intel_crtc->pipe;
+    DisplayModePtr mode;
+    int htot = INREG((pipe == 0) ? HTOTAL_A : HTOTAL_B);
+    int hsync = INREG((pipe == 0) ? HSYNC_A : HSYNC_B);
+    int vtot = INREG((pipe == 0) ? VTOTAL_A : VTOTAL_B);
+    int vsync = INREG((pipe == 0) ? VSYNC_A : VSYNC_B);
+
+    mode = xcalloc(1, sizeof(DisplayModeRec));
+    if (mode == NULL)
+	return NULL;
+
+    memset(mode, 0, sizeof(*mode));
+
+    mode->Clock = i830_crtc_clock_get(pScrn, crtc);
+    mode->HDisplay = (htot & 0xffff) + 1;
+    mode->HTotal = ((htot & 0xffff0000) >> 16) + 1;
+    mode->HSyncStart = (hsync & 0xffff) + 1;
+    mode->HSyncEnd = ((hsync & 0xffff0000) >> 16) + 1;
+    mode->VDisplay = (vtot & 0xffff) + 1;
+    mode->VTotal = ((vtot & 0xffff0000) >> 16) + 1;
+    mode->VSyncStart = (vsync & 0xffff) + 1;
+    mode->VSyncEnd = ((vsync & 0xffff0000) >> 16) + 1;
+    xf86SetModeDefaultName(mode);
+    xf86SetModeCrtc(mode, 0);
+
+    return mode;
+}
+
 static const xf86CrtcFuncsRec i830_crtc_funcs = {
     .dpms = i830_crtc_dpms,
     .save = NULL, /* XXX */
diff --git a/src/i830_display.h b/src/i830_display.h
index dc800553..dbd1ea8e 100644
--- a/src/i830_display.h
+++ b/src/i830_display.h
@@ -39,3 +39,4 @@ xf86CrtcPtr i830GetLoadDetectPipe(xf86OutputPtr output);
 void i830ReleaseLoadDetectPipe(xf86OutputPtr output);
 void i830_crtc_init(ScrnInfoPtr pScrn, int pipe);
 void i830_crtc_load_lut(xf86CrtcPtr crtc);
+DisplayModePtr i830_crtc_mode_get(ScrnInfoPtr pScrn, xf86CrtcPtr crtc);
diff --git a/src/i830_driver.c b/src/i830_driver.c
index 0f663115..cb3dd878 100644
--- a/src/i830_driver.c
+++ b/src/i830_driver.c
@@ -1332,10 +1332,10 @@ I830PreInit(ScrnInfoPtr pScrn, int flags)
    }
 
    I830PreInitDDC(pScrn);
-   I830SetupOutputs(pScrn);
    for (i = 0; i < num_pipe; i++) {
        i830_crtc_init(pScrn, i);
    }
+   I830SetupOutputs(pScrn);
 
    SaveHWState(pScrn);
    /* Do an initial detection of the outputs while none are configured on yet.
diff --git a/src/i830_exa.c b/src/i830_exa.c
index 97b4a98e..42552d44 100644
--- a/src/i830_exa.c
+++ b/src/i830_exa.c
@@ -346,7 +346,8 @@ I830EXAInit(ScreenPtr pScreen)
      * i965 limits 3D surface to 4kB-aligned offset if tiled.
      * i965 limits 3D surfaces to w,h of ?,8192.
      * i965 limits 3D surface to pitch of 1B - 128kB.
-     * i965 limits 3D surface pitch alignment to 512B, only if tiled.
+     * i965 limits 3D surface pitch alignment to 1 or 2 times the element size.
+     * i965 limits 3D surface pitch alignment to 512B if tiled.
      * i965 limits 3D destination drawing rect to w,h of 8192,8192.
      *
      * i915 limits 3D textures to 4B-aligned offset if un-tiled.
@@ -374,7 +375,7 @@ I830EXAInit(ScreenPtr pScreen)
      */
     if (IS_I965G(pI830)) {
 	pI830->EXADriverPtr->pixmapOffsetAlign = 4 * 2;
-	pI830->EXADriverPtr->pixmapPitchAlign = 1;
+	pI830->EXADriverPtr->pixmapPitchAlign = 16;
 	pI830->EXADriverPtr->maxX = 8192;
 	pI830->EXADriverPtr->maxY = 8192;
     } else {
diff --git a/src/i830_lvds.c b/src/i830_lvds.c
index 59af13b9..4c1afb05 100644
--- a/src/i830_lvds.c
+++ b/src/i830_lvds.c
@@ -32,6 +32,7 @@
 #include "xf86.h"
 #include "i830.h"
 #include "i830_bios.h"
+#include "i830_display.h"
 #include "X11/Xatom.h"
 
 /**
@@ -406,21 +407,99 @@ i830_lvds_init(ScrnInfoPtr pScrn)
     I830Ptr		    pI830 = I830PTR(pScrn);
     xf86OutputPtr	    output;
     I830OutputPrivatePtr    intel_output;
+    DisplayModePtr	    modes, scan, bios_mode;
 
+    output = xf86OutputCreate (pScrn, &i830_lvds_output_funcs, "LVDS");
+    if (!output)
+	return;
+    intel_output = xnfcalloc (sizeof (I830OutputPrivateRec), 1);
+    if (!intel_output)
+    {
+	xf86OutputDestroy (output);
+	return;
+    }
+    intel_output->type = I830_OUTPUT_LVDS;
+    output->driver_private = intel_output;
+    output->subpixel_order = SubPixelHorizontalRGB;
+    output->interlaceAllowed = FALSE;
+    output->doubleScanAllowed = FALSE;
+
+    /* Set up the LVDS DDC channel.  Most panels won't support it, but it can
+     * be useful if available.
+     */
+    I830I2CInit(pScrn, &intel_output->pDDCBus, GPIOC, "LVDSDDC_C");
+
+    /* Attempt to get the fixed panel mode from DDC.  Assume that the preferred
+     * mode is the right one.
+     */
+    modes = i830_ddc_get_modes(output);
+    for (scan = modes; scan != NULL; scan = scan->next) {
+	if (scan->type & M_T_PREFERRED)
+	    break;
+    }
+    if (scan != NULL) {
+	/* Pull our chosen mode out and make it the fixed mode */
+	if (modes == scan)
+	    modes = modes->next;
+	if (scan->prev != NULL)
+	    scan->prev = scan->next;
+	if (scan->next != NULL)
+	    scan->next = scan->prev;
+	pI830->panel_fixed_mode = scan;
+    }
+    /* Delete the mode list */
+    while (modes != NULL)
+	xf86DeleteMode(&modes, modes);
+
+    /* If we didn't get EDID, try checking if the panel is already turned on.
+     * If so, assume that whatever is currently programmed is the correct mode.
+     */
+    if (pI830->panel_fixed_mode == NULL) {
+	CARD32 lvds = INREG(LVDS);
+	int pipe = (lvds & LVDS_PIPEB_SELECT) ? 1 : 0;
+	xf86CrtcConfigPtr xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+	xf86CrtcPtr crtc = xf86_config->crtc[pipe];
+
+	if (lvds & LVDS_PORT_EN) {
+	    pI830->panel_fixed_mode = i830_crtc_mode_get(pScrn, crtc);
+	    if (pI830->panel_fixed_mode != NULL)
+		pI830->panel_fixed_mode->type |= M_T_PREFERRED;
+	}
+    }
 
     /* Get the LVDS fixed mode out of the BIOS.  We should support LVDS with
      * the BIOS being unavailable or broken, but lack the configuration options
      * for now.
      */
-    if (!i830GetLVDSInfoFromBIOS(pScrn))
-	return;
+    bios_mode = i830_bios_get_panel_mode(pScrn);
+    if (bios_mode != NULL) {
+	if (pI830->panel_fixed_mode != NULL) {
+	    if (!xf86ModesEqual(pI830->panel_fixed_mode, bios_mode)) {
+		xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+			   "BIOS panel mode data doesn't match probed data, "
+			   "continuing with probed.\n");
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO, "BIOS mode:\n");
+		xf86PrintModeline(pScrn->scrnIndex, bios_mode);
+		xf86DrvMsg(pScrn->scrnIndex, X_INFO, "probed mode:\n");
+		xf86PrintModeline(pScrn->scrnIndex, pI830->panel_fixed_mode);
+		xfree(bios_mode->name);
+		xfree(bios_mode);
+	    }
+	}  else {
+	    pI830->panel_fixed_mode = bios_mode;
+	}
+    } else {
+	xf86DrvMsg(pScrn->scrnIndex, X_WARNING,
+		   "Couldn't detect panel mode.  Disabling panel\n");
+	goto disable_exit;
+    }
 
     /* Blacklist machines with BIOSes that list an LVDS panel without actually
      * having one.
      */
     if (pI830->PciInfo->chipType == PCI_CHIP_I945_GM) {
 	if (pI830->PciInfo->subsysVendor == 0xa0a0)  /* aopen mini pc */
-	    return;
+	    goto disable_exit;
 
 	if ((pI830->PciInfo->subsysVendor == 0x8086) &&
 	    (pI830->PciInfo->subsysCard == 0x7270)) {
@@ -435,31 +514,19 @@ i830_lvds_init(ScrnInfoPtr pScrn)
 
 	    if (pI830->panel_fixed_mode != NULL &&
 		pI830->panel_fixed_mode->HDisplay == 800 &&
-		pI830->panel_fixed_mode->VDisplay == 600) {
+		pI830->panel_fixed_mode->VDisplay == 600)
+	    {
 		xf86DrvMsg(pScrn->scrnIndex, X_INFO,
 			   "Suspected Mac Mini, ignoring the LVDS\n");
-		return;
+		goto disable_exit;
 	    }
 	}
-   }
-
-    output = xf86OutputCreate (pScrn, &i830_lvds_output_funcs, "LVDS");
-    if (!output)
-	return;
-    intel_output = xnfcalloc (sizeof (I830OutputPrivateRec), 1);
-    if (!intel_output)
-    {
-	xf86OutputDestroy (output);
-	return;
     }
-    intel_output->type = I830_OUTPUT_LVDS;
-    output->driver_private = intel_output;
-    output->subpixel_order = SubPixelHorizontalRGB;
-    output->interlaceAllowed = FALSE;
-    output->doubleScanAllowed = FALSE;
 
-    /* Set up the LVDS DDC channel.  Most panels won't support it, but it can
-     * be useful if available.
-     */
-    I830I2CInit(pScrn, &intel_output->pDDCBus, GPIOC, "LVDSDDC_C");
+    return;
+
+disable_exit:
+    xf86DestroyI2CBusRec(intel_output->pDDCBus, TRUE, TRUE);
+    xfree(intel_output);
+    xf86OutputDestroy(output);
 }
diff --git a/src/i830_randr.c b/src/i830_randr.c
index 5eccf4bd..811fc50e 100644
--- a/src/i830_randr.c
+++ b/src/i830_randr.c
@@ -608,6 +608,9 @@ xf86RandR12CrtcSet (ScreenPtr	pScreen,
     else if (mode && !xf86ModesEqual (&crtc->mode, mode))
 	changed = TRUE;
     
+    if (rotation != crtc->rotation)
+	changed = TRUE;
+
     if (x != crtc->x || y != crtc->y)
 	changed = TRUE;
     for (o = 0; o < config->num_output; o++) 
diff --git a/src/i830_sdvo.c b/src/i830_sdvo.c
index ea62ad96..46a35f1c 100644
--- a/src/i830_sdvo.c
+++ b/src/i830_sdvo.c
@@ -1079,8 +1079,7 @@ i830_sdvo_init(ScrnInfoPtr pScrn, int output_device)
     char		    *name_prefix;
     char		    *name_suffix;
 
-    output = xf86OutputCreate (pScrn, &i830_sdvo_output_funcs,
-			       "ADD2 PCIE card");
+    output = xf86OutputCreate (pScrn, &i830_sdvo_output_funcs,NULL);
     if (!output)
 	return;
     intel_output = xnfcalloc (sizeof (I830OutputPrivateRec) +
diff --git a/src/i830_tv.c b/src/i830_tv.c
index 79b6ae8b..5ee8866a 100644
--- a/src/i830_tv.c
+++ b/src/i830_tv.c
@@ -37,7 +37,6 @@
 #include "i830.h"
 #include "i830_display.h"
 #include <string.h>
-
 enum tv_type {
     TV_TYPE_NONE,
     TV_TYPE_UNKNOWN,
@@ -94,11 +93,67 @@ typedef struct {
     float   rv, gv, bv, av;
 } color_conversion_t;
 
+static const CARD32 filter_table[] = {
+    0xB1403000, 0x2E203500, 0x35002E20, 0x3000B140,
+    0x35A0B160, 0x2DC02E80, 0xB1403480, 0xB1603000,
+    0x2EA03640, 0x34002D80, 0x3000B120, 0x36E0B160,
+    0x2D202EF0, 0xB1203380, 0xB1603000, 0x2F303780,
+    0x33002CC0, 0x3000B100, 0x3820B160, 0x2C802F50,
+    0xB10032A0, 0xB1603000, 0x2F9038C0, 0x32202C20,
+    0x3000B0E0, 0x3980B160, 0x2BC02FC0, 0xB0E031C0,
+    0xB1603000, 0x2FF03A20, 0x31602B60, 0xB020B0C0,
+    0x3AE0B160, 0x2B001810, 0xB0C03120, 0xB140B020,
+    0x18283BA0, 0x30C02A80, 0xB020B0A0, 0x3C60B140,
+    0x2A201838, 0xB0A03080, 0xB120B020, 0x18383D20,
+    0x304029C0, 0xB040B080, 0x3DE0B100, 0x29601848,
+    0xB0803000, 0xB100B040, 0x18483EC0, 0xB0402900,
+    0xB040B060, 0x3F80B0C0, 0x28801858, 0xB060B080,
+    0xB0A0B060, 0x18602820, 0xB0A02820, 0x0000B060,
+    0xB1403000, 0x2E203500, 0x35002E20, 0x3000B140,
+    0x35A0B160, 0x2DC02E80, 0xB1403480, 0xB1603000,
+    0x2EA03640, 0x34002D80, 0x3000B120, 0x36E0B160,
+    0x2D202EF0, 0xB1203380, 0xB1603000, 0x2F303780,
+    0x33002CC0, 0x3000B100, 0x3820B160, 0x2C802F50,
+    0xB10032A0, 0xB1603000, 0x2F9038C0, 0x32202C20,
+    0x3000B0E0, 0x3980B160, 0x2BC02FC0, 0xB0E031C0,
+    0xB1603000, 0x2FF03A20, 0x31602B60, 0xB020B0C0,
+    0x3AE0B160, 0x2B001810, 0xB0C03120, 0xB140B020,
+    0x18283BA0, 0x30C02A80, 0xB020B0A0, 0x3C60B140,
+    0x2A201838, 0xB0A03080, 0xB120B020, 0x18383D20,
+    0x304029C0, 0xB040B080, 0x3DE0B100, 0x29601848,
+    0xB0803000, 0xB100B040, 0x18483EC0, 0xB0402900,
+    0xB040B060, 0x3F80B0C0, 0x28801858, 0xB060B080,
+    0xB0A0B060, 0x18602820, 0xB0A02820, 0x0000B060,
+    0x36403000, 0x2D002CC0, 0x30003640, 0x2D0036C0,
+    0x35C02CC0, 0x37403000, 0x2C802D40, 0x30003540,
+    0x2D8037C0, 0x34C02C40, 0x38403000, 0x2BC02E00,
+    0x30003440, 0x2E2038C0, 0x34002B80, 0x39803000,
+    0x2B402E40, 0x30003380, 0x2E603A00, 0x33402B00,
+    0x3A803040, 0x2A802EA0, 0x30403300, 0x2EC03B40,
+    0x32802A40, 0x3C003040, 0x2A002EC0, 0x30803240,
+    0x2EC03C80, 0x320029C0, 0x3D403080, 0x29402F00,
+    0x308031C0, 0x2F203DC0, 0x31802900, 0x3E8030C0,
+    0x28802F40, 0x30C03140, 0x2F203F40, 0x31402840,
+    0x28003100, 0x28002F00, 0x00003100, 0x36403000, 
+    0x2D002CC0, 0x30003640, 0x2D0036C0,
+    0x35C02CC0, 0x37403000, 0x2C802D40, 0x30003540,
+    0x2D8037C0, 0x34C02C40, 0x38403000, 0x2BC02E00,
+    0x30003440, 0x2E2038C0, 0x34002B80, 0x39803000,
+    0x2B402E40, 0x30003380, 0x2E603A00, 0x33402B00,
+    0x3A803040, 0x2A802EA0, 0x30403300, 0x2EC03B40,
+    0x32802A40, 0x3C003040, 0x2A002EC0, 0x30803240,
+    0x2EC03C80, 0x320029C0, 0x3D403080, 0x29402F00,
+    0x308031C0, 0x2F203DC0, 0x31802900, 0x3E8030C0,
+    0x28802F40, 0x30C03140, 0x2F203F40, 0x31402840,
+    0x28003100, 0x28002F00, 0x00003100,
+};
+
 typedef struct {
     char *name;
+    int	clock;
     CARD32 oversample;
     int hsync_end, hblank_start, hblank_end, htotal;
-    Bool progressive;
+    Bool progressive, trilevel_sync, component_only;
     int vsync_start_f1, vsync_start_f2, vsync_len;
     Bool veq_ena;
     int veq_start_f1, veq_start_f2, veq_len;
@@ -120,9 +175,10 @@ typedef struct {
      */
     video_levels_t	composite_levels, svideo_levels;
     color_conversion_t	composite_color, svideo_color;
+    const CARD32 *filter_table;
+    int max_srcw;
 } tv_mode_t;
 
-#define TV_PLL_CLOCK	107520
 
 /*
  * Sub carrier DDA
@@ -157,25 +213,26 @@ typedef struct {
 
 const static tv_mode_t tv_modes[] = {
     {
-	.name		= "NTSC 480i",
+	.name		= "NTSC-M",
+	.clock		= 107520,	
 	.oversample	= TV_OVERSAMPLE_8X,
-	
+	.component_only = 0,
 	/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
 
 	.hsync_end	= 64,		    .hblank_end		= 124,
 	.hblank_start	= 836,		    .htotal		= 857,
-	
-	.progressive	= FALSE,
-	
+
+	.progressive	= FALSE,	    .trilevel_sync = FALSE,
+
 	.vsync_start_f1	= 6,		    .vsync_start_f2	= 7,
 	.vsync_len	= 6,
-	
+
 	.veq_ena	= TRUE,		    .veq_start_f1    	= 0,
 	.veq_start_f2	= 1,		    .veq_len		= 18,
-	
+
 	.vi_end_f1	= 20,		    .vi_end_f2		= 21,
 	.nbr_end	= 240,
-	
+
 	.burst_ena	= TRUE,
 	.hburst_start	= 72,		    .hburst_len		= 34,
 	.vburst_start_f1 = 9,		    .vburst_end_f1	= 240,
@@ -203,26 +260,78 @@ const static tv_mode_t tv_modes[] = {
 	    .ru =-0.0885, .gu =-0.1738, .bu = 0.2624, .au = 1.0000,
 	    .rv = 0.3693, .gv =-0.3092, .bv =-0.0601, .av = 1.0000,
 	},
+	.filter_table = filter_table,
     },
     {
-	.name		= "NTSC-Japan 480i",
+	.name		= "NTSC-443",
+	.clock		= 107520,	
 	.oversample	= TV_OVERSAMPLE_8X,
-	
-	/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
+	.component_only = 0,
+	/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 4.43MHz */
 	.hsync_end	= 64,		    .hblank_end		= 124,
 	.hblank_start	= 836,		    .htotal		= 857,
-	
-	.progressive	= FALSE,
-	
-	.vsync_start_f1	= 6,		    .vsync_start_f2	= 7,
+
+	.progressive	= FALSE,	    .trilevel_sync = FALSE,
+
+	.vsync_start_f1 = 6,		    .vsync_start_f2	= 7,
 	.vsync_len	= 6,
-	
+
 	.veq_ena	= TRUE,		    .veq_start_f1    	= 0,
 	.veq_start_f2	= 1,		    .veq_len		= 18,
-	
+
+	.vi_end_f1	= 20,		    .vi_end_f2		= 21,
+	.nbr_end	= 240,
+
+	.burst_ena	= 8,
+	.hburst_start	= 72,		    .hburst_len		= 34,
+	.vburst_start_f1 = 9,		    .vburst_end_f1	= 240,
+	.vburst_start_f2 = 10,		    .vburst_end_f2	= 240,
+	.vburst_start_f3 = 9,		    .vburst_end_f3	= 240, 
+	.vburst_start_f4 = 10,		    .vburst_end_f4	= 240,
+
+	/* desired 4.4336180 actual 4.4336180 clock 107.52 */
+	.dda1_inc       =    168,
+	.dda2_inc       =  18557,       .dda2_size      =  20625,
+	.dda3_inc       =      0,       .dda3_size      =      0,
+	.sc_reset   = TV_SC_RESET_EVERY_8,
+	.pal_burst  = TRUE,
+
+	.composite_levels = { .blank = 225, .black = 267, .burst = 113 },
+	.composite_color = {
+	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.5082,
+	    .ru =-0.0749, .gu =-0.1471, .bu = 0.2220, .au = 1.0000,
+	    .rv = 0.3125, .gv =-0.2616, .bv =-0.0508, .av = 1.0000,
+	},
+
+	.svideo_levels    = { .blank = 266, .black = 316, .burst = 133 },
+	.svideo_color = {
+	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.6006,
+	    .ru =-0.0885, .gu =-0.1738, .bu = 0.2624, .au = 1.0000,
+	    .rv = 0.3693, .gv =-0.3092, .bv =-0.0601, .av = 1.0000,
+	},
+	.filter_table = filter_table,
+    },
+    {
+	.name		= "NTSC-J",
+	.clock		= 107520,	
+	.oversample	= TV_OVERSAMPLE_8X,
+	.component_only = 0,
+
+	/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
+	.hsync_end	= 64,		    .hblank_end		= 124,
+	.hblank_start = 836,	    .htotal		= 857,
+
+	.progressive	= FALSE,    .trilevel_sync = FALSE,
+
+	.vsync_start_f1	= 6,	    .vsync_start_f2	= 7,
+	.vsync_len	= 6,
+
+	.veq_ena	= TRUE,		    .veq_start_f1    	= 0,
+	.veq_start_f2 = 1,	    .veq_len		= 18,
+
 	.vi_end_f1	= 20,		    .vi_end_f2		= 21,
 	.nbr_end	= 240,
-	
+
 	.burst_ena	= TRUE,
 	.hburst_start	= 72,		    .hburst_len		= 34,
 	.vburst_start_f1 = 9,		    .vburst_end_f1	= 240,
@@ -250,20 +359,74 @@ const static tv_mode_t tv_modes[] = {
 	    .ru =-0.0957, .gu =-0.1879, .bu = 0.2836, .au = 1.0000,
 	    .rv = 0.3992, .gv =-0.3343, .bv =-0.0649, .av = 1.0000,
 	},
+	.filter_table = filter_table,
+    },
+    {
+	.name		= "PAL-M",
+	.clock		= 107520,	
+	.oversample	= TV_OVERSAMPLE_8X,
+	.component_only = 0,
+
+	/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.580MHz */
+	.hsync_end	= 64,		  .hblank_end		= 124,
+	.hblank_start = 836,	  .htotal		= 857,
+
+	.progressive	= FALSE,	    .trilevel_sync = FALSE,
+
+	.vsync_start_f1	= 6,		    .vsync_start_f2	= 7,
+	.vsync_len	= 6,
+
+	.veq_ena	= TRUE,		    .veq_start_f1    	= 0,
+	.veq_start_f2	= 1,		    .veq_len		= 18,
+
+	.vi_end_f1	= 20,		    .vi_end_f2		= 21,
+	.nbr_end	= 240,
+
+	.burst_ena	= TRUE,
+	.hburst_start	= 72,		    .hburst_len		= 34,
+	.vburst_start_f1 = 9,		    .vburst_end_f1	= 240,
+	.vburst_start_f2 = 10,		    .vburst_end_f2	= 240,
+	.vburst_start_f3 = 9,		    .vburst_end_f3	= 240, 
+	.vburst_start_f4 = 10,		    .vburst_end_f4	= 240,
+
+	/* desired 3.5800000 actual 3.5800000 clock 107.52 */
+	.dda1_inc	=    136,
+	.dda2_inc	=    7624,	    .dda2_size		=  20013,
+	.dda3_inc	=      0,	    .dda3_size		=      0,
+	.sc_reset	= TV_SC_RESET_EVERY_4,
+	.pal_burst  = FALSE,
+
+	.composite_levels = { .blank = 225, .black = 267, .burst = 113 },
+	.composite_color = {
+	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.5082,
+	    .ru =-0.0749, .gu =-0.1471, .bu = 0.2220, .au = 1.0000,
+	    .rv = 0.3125, .gv =-0.2616, .bv =-0.0508, .av = 1.0000,
+	},
+
+	.svideo_levels    = { .blank = 266, .black = 316, .burst = 133 },
+	.svideo_color = {
+	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.6006,
+	    .ru =-0.0885, .gu =-0.1738, .bu = 0.2624, .au = 1.0000,
+	    .rv = 0.3693, .gv =-0.3092, .bv =-0.0601, .av = 1.0000,
+	},
+	.filter_table = filter_table,
     },
     {
 	/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
-	.name	    = "PAL 576i",
+	.name	    = "PAL-N",
+	.clock		= 107520,	
 	.oversample	= TV_OVERSAMPLE_8X,
+	.component_only = 0,
 
 	.hsync_end	= 64,		    .hblank_end		= 128,
-	.hblank_start	= 844,		    .htotal		= 863,
-	
-	.progressive	= FALSE,
-	
-	.vsync_start_f1	= 6,		    .vsync_start_f2	= 7,
+	.hblank_start = 844,	    .htotal		= 863,
+
+	.progressive  = FALSE,    .trilevel_sync = FALSE,
+
+
+	.vsync_start_f1	= 6,	   .vsync_start_f2	= 7,
 	.vsync_len	= 6,
-	
+
 	.veq_ena	= TRUE,		    .veq_start_f1    	= 0,
 	.veq_start_f2	= 1,		    .veq_len		= 18,
 
@@ -271,44 +434,70 @@ const static tv_mode_t tv_modes[] = {
 	.nbr_end	= 286,
 
 	.burst_ena	= TRUE,
-	.hburst_start	= 73,		    .hburst_len		= 34,
-	.vburst_start_f1 = 8,		    .vburst_end_f1	= 285,
-	.vburst_start_f2 = 8,		    .vburst_end_f2	= 286,
-	.vburst_start_f3 = 9,		    .vburst_end_f3	= 286, 
-	.vburst_start_f4 = 9,		    .vburst_end_f4	= 285,
+	.hburst_start = 73,	    	    .hburst_len		= 34,
+	.vburst_start_f1 = 8,	    .vburst_end_f1	= 285,
+	.vburst_start_f2 = 8,	    .vburst_end_f2	= 286,
+	.vburst_start_f3 = 9,	    .vburst_end_f3	= 286, 
+	.vburst_start_f4 = 9,	    .vburst_end_f4	= 285,
+
 
 	/* desired 4.4336180 actual 4.4336180 clock 107.52 */
-	.dda1_inc	=    168,
-	.dda2_inc	=  18557,	.dda2_size	=  20625,
-	.dda3_inc	=      0,	.dda3_size	=      0,
+	.dda1_inc       =    168,
+	.dda2_inc       =  18557,       .dda2_size      =  20625,
+	.dda3_inc       =      0,       .dda3_size      =      0,
 	.sc_reset   = TV_SC_RESET_EVERY_8,
 	.pal_burst  = TRUE,
-	
-	.composite_levels = { .blank = 237, .black = 237, .burst = 118 },
+
+	.composite_levels = { .blank = 225, .black = 267, .burst = 118 },
 	.composite_color = {
-	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.5379,
-	    .ru =-0.0793, .gu =-0.1557, .bu = 0.2350, .au = 1.0000,
-	    .rv = 0.3307, .gv =-0.2769, .bv =-0.0538, .av = 1.0000,
+	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.5082,
+	    .ru =-0.0749, .gu =-0.1471, .bu = 0.2220, .au = 1.0000,
+	    .rv = 0.3125, .gv =-0.2616, .bv =-0.0508, .av = 1.0000,
 	},
 
-	.svideo_levels    = { .blank = 280, .black = 280, .burst = 139 },
+	.svideo_levels    = { .blank = 266, .black = 316, .burst = 139 },
 	.svideo_color = {
-	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.6357,
-	    .ru =-0.0937, .gu =-0.1840, .bu = 0.2777, .au = 1.0000,
-	    .rv = 0.3908, .gv =-0.3273, .bv =-0.0636, .av = 1.0000,
+	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.6006,
+	    .ru =-0.0885, .gu =-0.1738, .bu = 0.2624, .au = 1.0000,
+	    .rv = 0.3693, .gv =-0.3092, .bv =-0.0601, .av = 1.0000,
 	},
-    }
-#if 0
+	.filter_table = filter_table,
+    },
     {
 	/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 4.434MHz */
 	.name	    = "PAL",
+	.clock		= 107520,	
+	.oversample	= TV_OVERSAMPLE_8X,
+	.component_only = 0,
+
+	.hsync_end	= 64,		    .hblank_end		= 128,
+	.hblank_start	= 844,	    .htotal		= 863,
+
+	.progressive	= FALSE,    .trilevel_sync = FALSE,
+
+	.vsync_start_f1	= 5,	    .vsync_start_f2	= 6,
+	.vsync_len	= 5,
+
+	.veq_ena	= TRUE,		    .veq_start_f1    	= 0,
+	.veq_start_f2	= 1,	    .veq_len		= 15,
+
+	.vi_end_f1	= 24,		    .vi_end_f2		= 25,
+	.nbr_end	= 286,
+
+	.burst_ena	= TRUE,
+	.hburst_start	= 73,		    .hburst_len		= 32,
+	.vburst_start_f1 = 8,		    .vburst_end_f1	= 285,
+	.vburst_start_f2 = 8,		    .vburst_end_f2	= 286,
+	.vburst_start_f3 = 9,		    .vburst_end_f3	= 286, 
+	.vburst_start_f4 = 9,		    .vburst_end_f4	= 285,
+
 	/* desired 4.4336180 actual 4.4336180 clock 107.52 */
-	.dda1_inc	=    168,
-	.dda2_inc	=  18557,	.dda2_size	=  20625,
-	.dda3_inc	=      0,	.dda3_size	=      0,
+	.dda1_inc       =    168,
+	.dda2_inc       =  18557,       .dda2_size      =  20625,
+	.dda3_inc       =      0,       .dda3_size      =      0,
 	.sc_reset   = TV_SC_RESET_EVERY_8,
-	.pal_burst  = TRUE
-	
+	.pal_burst  = TRUE,
+
 	.composite_levels = { .blank = 237, .black = 237, .burst = 118 },
 	.composite_color = {
 	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.5379,
@@ -322,84 +511,226 @@ const static tv_mode_t tv_modes[] = {
 	    .ru =-0.0937, .gu =-0.1840, .bu = 0.2777, .au = 1.0000,
 	    .rv = 0.3908, .gv =-0.3273, .bv =-0.0636, .av = 1.0000,
 	},
+	.filter_table = filter_table,
     },
     {
-	/* 525 Lines, 60 Fields, 15.734KHz line, Sub-Carrier 3.576MHz */
-	.name	    = "PAL M",
-	/* desired 3.5756110 actual 3.5756110 clock 107.52 */
-	.dda1_inc	=    136,
-	.dda2_inc	=   5611,	.dda2_size	=  26250,
-	.dda3_inc	=      0,	.dda3_size	=      0,
-	.sc_reset   = TV_SC_RESET_EVERY_8,
-	.pal_burst  = TRUE
-	
-	.composite_levels = { .blank = 225, .black = 267, .burst = 113 },
-	.composite_color = {
-	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.5082,
-	    .ru =-0.0749, .gu =-0.1471, .bu = 0.2220, .au = 1.0000,
-	    .rv = 0.3125, .gv =-0.2616, .bv =-0.0508, .av = 1.0000,
-	},
+	.name       = "480p@59.94Hz",
+	.clock 	= 107520,	
+	.oversample     = TV_OVERSAMPLE_4X,
+	.component_only = 1,
 
-	.svideo_levels    = { .blank = 266, .black = 316, .burst = 133 },
-	.svideo_color = {
-	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.6006,
-	    .ru =-0.0885, .gu =-0.1738, .bu = 0.2624, .au = 1.0000,
-	    .rv = 0.3693, .gv =-0.3092, .bv =-0.0601, .av = 1.0000,
-	},
+	.hsync_end      = 64,               .hblank_end         = 122,
+	.hblank_start   = 842,              .htotal             = 857,
+
+	.progressive    = TRUE,.trilevel_sync = FALSE,
+
+	.vsync_start_f1 = 12,               .vsync_start_f2     = 12,
+	.vsync_len      = 12,
+
+	.veq_ena        = FALSE,
+
+	.vi_end_f1      = 44,               .vi_end_f2          = 44,
+	.nbr_end        = 496,
+
+	.burst_ena      = FALSE,
+
+	.filter_table = filter_table,
     },
     {
-	/* 625 Lines, 50 Fields, 15.625KHz line, Sub-Carrier 3.582MHz */
-	.name	    = "PAL Nc",
-	/* desired 3.5820560 actual 3.5820560 clock 107.52 */
-	.dda1_inc	=    136,
-	.dda2_inc	=  12056,	.dda2_size	=  26250,
-	.dda3_inc	=      0,	.dda3_size	=      0,
-	.sc_reset   = TV_SC_RESET_EVERY_8,
-	.pal_burst  = TRUE
-	
-	.composite_levels = { .blank = 225, .black = 267, .burst = 113 },
-	.composite_color = {
-	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.5082,
-	    .ru =-0.0749, .gu =-0.1471, .bu = 0.2220, .au = 1.0000,
-	    .rv = 0.3125, .gv =-0.2616, .bv =-0.0508, .av = 1.0000,
-	},
+	.name       = "480p@60Hz",
+	.clock 	= 107520,	
+	.oversample     = TV_OVERSAMPLE_4X,
+	.component_only = 1,
 
-	.svideo_levels    = { .blank = 266, .black = 316, .burst = 133 },
-	.svideo_color = {
-	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.6006,
-	    .ru =-0.0885, .gu =-0.1738, .bu = 0.2624, .au = 1.0000,
-	    .rv = 0.3693, .gv =-0.3092, .bv =-0.0601, .av = 1.0000,
-	},
+	.hsync_end      = 64,               .hblank_end         = 122,
+	.hblank_start   = 842,              .htotal             = 856,
+
+	.progressive    = TRUE,.trilevel_sync = FALSE,
+
+	.vsync_start_f1 = 12,               .vsync_start_f2     = 12,
+	.vsync_len      = 12,
+
+	.veq_ena        = FALSE,
+
+	.vi_end_f1      = 44,               .vi_end_f2          = 44,
+	.nbr_end        = 496,
+
+	.burst_ena      = FALSE,
+
+	.filter_table = filter_table,
     },
     {
-	/* 525 lines, 60 fields, 15.734KHz line, Sub-Carrier 4.43MHz */
-	.name	    = "NTSC-4.43(nonstandard)",
-	/* desired 4.4336180 actual 4.4336180 clock 107.52 */
-	.dda1_inc	=    168,
-	.dda2_inc	=  18557,	.dda2_size	=  20625,
-	.dda3_inc	=      0,	.dda3_size	=      0,
-	.sc_reset   = TV_SC_RESET_NEVER,
-	.pal_burst  = FALSE
+	.name       = "576p",
+	.clock 	= 107520,	
+	.oversample     = TV_OVERSAMPLE_4X,
+	.component_only = 1,
 
-	.composite_levels = { .blank = 225, .black = 267, .burst = 113 },
-	.composite_color = {
-	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.5082,
-	    .ru =-0.0749, .gu =-0.1471, .bu = 0.2220, .au = 1.0000,
-	    .rv = 0.3125, .gv =-0.2616, .bv =-0.0508, .av = 1.0000,
-	},
+	.hsync_end      = 64,               .hblank_end         = 139,
+	.hblank_start   = 859,              .htotal             = 863,
 
-	.svideo_levels    = { .blank = 266, .black = 316, .burst = 133 },
-	.svideo_color = {
-	    .ry = 0.2990, .gy = 0.5870, .by = 0.1140, .ay = 0.6006,
-	    .ru =-0.0885, .gu =-0.1738, .bu = 0.2624, .au = 1.0000,
-	    .rv = 0.3693, .gv =-0.3092, .bv =-0.0601, .av = 1.0000,
-	},
+	.progressive    = TRUE,		.trilevel_sync = FALSE,
+
+	.vsync_start_f1 = 10,               .vsync_start_f2     = 10,
+	.vsync_len      = 10,
+
+	.veq_ena        = FALSE,
+
+	.vi_end_f1      = 48,               .vi_end_f2          = 48,
+	.nbr_end        = 575,
+
+	.burst_ena      = FALSE,
+
+	.filter_table = filter_table,
+    },
+    {
+	.name       = "720p@60Hz",
+	.clock		= 148800,	
+	.oversample     = TV_OVERSAMPLE_2X,
+	.component_only = 1,
+
+	.hsync_end      = 80,               .hblank_end         = 300,
+	.hblank_start   = 1580,             .htotal             = 1649,
+
+	.progressive    = TRUE, 	    .trilevel_sync = TRUE,
+
+	.vsync_start_f1 = 10,               .vsync_start_f2     = 10,
+	.vsync_len      = 10,
+
+	.veq_ena        = FALSE,
+
+	.vi_end_f1      = 29,               .vi_end_f2          = 29,
+	.nbr_end        = 719,
+
+	.burst_ena      = FALSE,
+
+	.filter_table = filter_table,
+    },
+    {
+	.name       = "720p@59.94Hz",
+	.clock		= 148800,	
+	.oversample     = TV_OVERSAMPLE_2X,
+	.component_only = 1,
+
+	.hsync_end      = 80,               .hblank_end         = 300,
+	.hblank_start   = 1580,             .htotal             = 1651,
+
+	.progressive    = TRUE, 	    .trilevel_sync = TRUE,
+
+	.vsync_start_f1 = 10,               .vsync_start_f2     = 10,
+	.vsync_len      = 10,
+
+	.veq_ena        = FALSE,
+
+	.vi_end_f1      = 29,               .vi_end_f2          = 29,
+	.nbr_end        = 719,
+
+	.burst_ena      = FALSE,
+
+	.filter_table = filter_table,
+    },
+    {
+	.name       = "720p@50Hz",
+	.clock		= 148800,	
+	.oversample     = TV_OVERSAMPLE_2X,
+	.component_only = 1,
+
+	.hsync_end      = 80,               .hblank_end         = 300,
+	.hblank_start   = 1580,             .htotal             = 1979,
+
+	.progressive    = TRUE, 	        .trilevel_sync = TRUE,
+
+	.vsync_start_f1 = 10,               .vsync_start_f2     = 10,
+	.vsync_len      = 10,
+
+	.veq_ena        = FALSE,
+
+	.vi_end_f1      = 29,               .vi_end_f2          = 29,
+	.nbr_end        = 719,
+
+	.burst_ena      = FALSE,
+
+	.filter_table = filter_table,
+	.max_srcw = 800
+    },
+    {
+	.name       = "1080i@50Hz",
+	.clock		= 148800,	
+	.oversample     = TV_OVERSAMPLE_2X,
+	.component_only = 1,
+
+	.hsync_end      = 88,               .hblank_end         = 235,
+	.hblank_start   = 2155,             .htotal             = 2639,
+
+	.progressive    = FALSE, 	    .trilevel_sync = TRUE,
+
+	.vsync_start_f1 = 4,              .vsync_start_f2     = 5,
+	.vsync_len      = 10,
+
+	.veq_ena	= TRUE,		    .veq_start_f1    	= 4,
+	.veq_start_f2   = 4,	    .veq_len		= 10,
+
+
+	.vi_end_f1      = 21,           .vi_end_f2          = 22,
+	.nbr_end        = 539,
+
+	.burst_ena      = FALSE,
+
+	.filter_table = filter_table,
+    },
+    {
+	.name       = "1080i@60Hz",
+	.clock		= 148800,	
+	.oversample     = TV_OVERSAMPLE_2X,
+	.component_only = 1,
+
+	.hsync_end      = 88,               .hblank_end         = 235,
+	.hblank_start   = 2155,             .htotal             = 2199,
+
+	.progressive    = FALSE, 	    .trilevel_sync = TRUE,
+
+	.vsync_start_f1 = 4,               .vsync_start_f2     = 5,
+	.vsync_len      = 10,
+
+	.veq_ena	= TRUE,		    .veq_start_f1    	= 4,
+	.veq_start_f2	= 4,		    .veq_len		= 10,
+
+
+	.vi_end_f1      = 21,               .vi_end_f2          = 22,
+	.nbr_end        = 539,
+
+	.burst_ena      = FALSE,
+
+	.filter_table = filter_table,
+    },
+    {
+	.name       = "1080i@59.94Hz",
+	.clock		= 148800,	
+	.oversample     = TV_OVERSAMPLE_2X,
+	.component_only = 1,
+
+	.hsync_end      = 88,               .hblank_end         = 235,
+	.hblank_start   = 2155,             .htotal             = 2200,
+
+	.progressive    = FALSE, 	    .trilevel_sync = TRUE,
+
+	.vsync_start_f1 = 4,            .vsync_start_f2    = 5,
+	.vsync_len      = 10,
+
+	.veq_ena	= TRUE,		    .veq_start_f1	= 4,
+	.veq_start_f2 = 4,	    	    .veq_len = 10,
+
+
+	.vi_end_f1      = 21,           .vi_end_f2         	= 22,
+	.nbr_end        = 539,
+
+	.burst_ena      = FALSE,
+
+	.filter_table = filter_table,
     },
-#endif
 };
 
 static const video_levels_t component_level = {
-    .blank = 279, .black = 279 
+	.blank = 279, .black = 279 
 };
 
 static const color_conversion_t sdtv_component_color = {
@@ -407,13 +738,13 @@ static const color_conversion_t sdtv_component_color = {
     .ru =-0.1687, .gu =-0.3313, .bu = 0.5000, .au = 1.0000,
     .rv = 0.5000, .gv =-0.4187, .bv =-0.0813, .av = 1.0000,
 };
-    
+
 static const color_conversion_t hdtv_component_color = {
     .ry = 0.2126, .gy = 0.7152, .by = 0.0722, .ay = 0.6364,
     .ru =-0.1146, .gu =-0.3854, .bu = 0.5000, .au = 1.0000,
     .rv = 0.5000, .gv =-0.4542, .bv =-0.0458, .av = 1.0000,
 };
-    
+
 static void
 i830_tv_dpms(xf86OutputPtr output, int mode)
 {
@@ -421,14 +752,14 @@ i830_tv_dpms(xf86OutputPtr output, int mode)
     I830Ptr pI830 = I830PTR(pScrn);
 
     switch(mode) {
-    case DPMSModeOn:
-	OUTREG(TV_CTL, INREG(TV_CTL) | TV_ENC_ENABLE);
-	break;
-    case DPMSModeStandby:
-    case DPMSModeSuspend:
-    case DPMSModeOff:
-	OUTREG(TV_CTL, INREG(TV_CTL) & ~TV_ENC_ENABLE);
-	break;
+	case DPMSModeOn:
+	    OUTREG(TV_CTL, INREG(TV_CTL) | TV_ENC_ENABLE);
+	    break;
+	case DPMSModeStandby:
+	case DPMSModeSuspend:
+	case DPMSModeOff:
+	    OUTREG(TV_CTL, INREG(TV_CTL) & ~TV_ENC_ENABLE);
+	    break;
     }
 }
 
@@ -491,6 +822,11 @@ i830_tv_restore(xf86OutputPtr output)
     struct i830_tv_priv	    *dev_priv = intel_output->dev_priv;
     int			    i;
 
+    xf86CrtcPtr	    crtc = output->crtc;
+    I830CrtcPrivatePtr  intel_crtc;
+    if (!crtc)
+	return;
+    intel_crtc = crtc->driver_private;
     OUTREG(TV_H_CTL_1, dev_priv->save_TV_H_CTL_1);
     OUTREG(TV_H_CTL_2, dev_priv->save_TV_H_CTL_2);
     OUTREG(TV_H_CTL_3, dev_priv->save_TV_H_CTL_3);
@@ -513,11 +849,38 @@ i830_tv_restore(xf86OutputPtr output)
     OUTREG(TV_CSC_V2, dev_priv->save_TV_CSC_V2);
     OUTREG(TV_CLR_KNOBS, dev_priv->save_TV_CLR_KNOBS);
     OUTREG(TV_CLR_LEVEL, dev_priv->save_TV_CLR_LEVEL);
-    OUTREG(TV_WIN_POS, dev_priv->save_TV_WIN_POS);
-    OUTREG(TV_WIN_SIZE, dev_priv->save_TV_WIN_SIZE);
-    OUTREG(TV_FILTER_CTL_1, dev_priv->save_TV_FILTER_CTL_1);
-    OUTREG(TV_FILTER_CTL_2, dev_priv->save_TV_FILTER_CTL_2);
-    OUTREG(TV_FILTER_CTL_3, dev_priv->save_TV_FILTER_CTL_3);
+
+    {
+	int pipeconf_reg = (intel_crtc->pipe == 0)?PIPEACONF:PIPEBCONF;
+	int dspcntr_reg = (intel_crtc->pipe == 0)?DSPACNTR : DSPBCNTR;
+	int pipeconf = INREG(pipeconf_reg);
+	int dspcntr = INREG(dspcntr_reg);
+	int dspbase_reg = (intel_crtc->pipe == 0) ? DSPABASE : DSPBBASE;
+	/* Pipe must be off here */
+	OUTREG(dspcntr_reg, dspcntr & ~DISPLAY_PLANE_ENABLE);
+	/* Flush the plane changes */
+	OUTREG(dspbase_reg, INREG(dspbase_reg));
+
+	if (!IS_I9XX(pI830)) {
+	    /* Wait for vblank for the disable to take effect */
+	    i830WaitForVblank(pScrn);
+	}
+
+	OUTREG(pipeconf_reg, pipeconf & ~PIPEACONF_ENABLE);
+	/* Wait for vblank for the disable to take effect. */
+	i830WaitForVblank(pScrn);
+
+	/* Filter ctl must be set before TV_WIN_SIZE */
+	OUTREG(TV_FILTER_CTL_1, dev_priv->save_TV_FILTER_CTL_1);
+	OUTREG(TV_FILTER_CTL_2, dev_priv->save_TV_FILTER_CTL_2);
+	OUTREG(TV_FILTER_CTL_3, dev_priv->save_TV_FILTER_CTL_3);
+	OUTREG(TV_WIN_POS, dev_priv->save_TV_WIN_POS);
+	OUTREG(TV_WIN_SIZE, dev_priv->save_TV_WIN_SIZE);
+	OUTREG(pipeconf_reg, pipeconf);
+	OUTREG(dspcntr_reg, dspcntr);
+	/* Flush the plane changes */
+	OUTREG(dspbase_reg, INREG(dspbase_reg));
+    }
 
     for (i = 0; i < 60; i++)
 	OUTREG(TV_H_LUMA_0 + (i <<2), dev_priv->save_TV_H_LUMA[i]);
@@ -535,95 +898,32 @@ i830_tv_restore(xf86OutputPtr output)
 static int
 i830_tv_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
 {
-    return MODE_OK;
+	return MODE_OK;
 }
 
-static const CARD32 h_luma[60] = {
-    0xB1403000, 0x2E203500, 0x35002E20, 0x3000B140,
-    0x35A0B160, 0x2DC02E80, 0xB1403480, 0xB1603000,
-    0x2EA03640, 0x34002D80, 0x3000B120, 0x36E0B160,
-    0x2D202EF0, 0xB1203380, 0xB1603000, 0x2F303780,
-    0x33002CC0, 0x3000B100, 0x3820B160, 0x2C802F50,
-    0xB10032A0, 0xB1603000, 0x2F9038C0, 0x32202C20,
-    0x3000B0E0, 0x3980B160, 0x2BC02FC0, 0xB0E031C0,
-    0xB1603000, 0x2FF03A20, 0x31602B60, 0xB020B0C0,
-    0x3AE0B160, 0x2B001810, 0xB0C03120, 0xB140B020,
-    0x18283BA0, 0x30C02A80, 0xB020B0A0, 0x3C60B140,
-    0x2A201838, 0xB0A03080, 0xB120B020, 0x18383D20,
-    0x304029C0, 0xB040B080, 0x3DE0B100, 0x29601848,
-    0xB0803000, 0xB100B040, 0x18483EC0, 0xB0402900,
-    0xB040B060, 0x3F80B0C0, 0x28801858, 0xB060B080,
-    0xB0A0B060, 0x18602820, 0xB0A02820, 0x0000B060,
-};
-
-static const CARD32 h_chroma[60] = {
-    0xB1403000, 0x2E203500, 0x35002E20, 0x3000B140,
-    0x35A0B160, 0x2DC02E80, 0xB1403480, 0xB1603000,
-    0x2EA03640, 0x34002D80, 0x3000B120, 0x36E0B160,
-    0x2D202EF0, 0xB1203380, 0xB1603000, 0x2F303780,
-    0x33002CC0, 0x3000B100, 0x3820B160, 0x2C802F50,
-    0xB10032A0, 0xB1603000, 0x2F9038C0, 0x32202C20,
-    0x3000B0E0, 0x3980B160, 0x2BC02FC0, 0xB0E031C0,
-    0xB1603000, 0x2FF03A20, 0x31602B60, 0xB020B0C0,
-    0x3AE0B160, 0x2B001810, 0xB0C03120, 0xB140B020,
-    0x18283BA0, 0x30C02A80, 0xB020B0A0, 0x3C60B140,
-    0x2A201838, 0xB0A03080, 0xB120B020, 0x18383D20,
-    0x304029C0, 0xB040B080, 0x3DE0B100, 0x29601848,
-    0xB0803000, 0xB100B040, 0x18483EC0, 0xB0402900,
-    0xB040B060, 0x3F80B0C0, 0x28801858, 0xB060B080,
-    0xB0A0B060, 0x18602820, 0xB0A02820, 0x0000B060,
-};
-
-static const CARD32 v_luma[43] = {
-    0x36403000, 0x2D002CC0, 0x30003640, 0x2D0036C0,
-    0x35C02CC0, 0x37403000, 0x2C802D40, 0x30003540,
-    0x2D8037C0, 0x34C02C40, 0x38403000, 0x2BC02E00,
-    0x30003440, 0x2E2038C0, 0x34002B80, 0x39803000,
-    0x2B402E40, 0x30003380, 0x2E603A00, 0x33402B00,
-    0x3A803040, 0x2A802EA0, 0x30403300, 0x2EC03B40,
-    0x32802A40, 0x3C003040, 0x2A002EC0, 0x30803240,
-    0x2EC03C80, 0x320029C0, 0x3D403080, 0x29402F00,
-    0x308031C0, 0x2F203DC0, 0x31802900, 0x3E8030C0,
-    0x28802F40, 0x30C03140, 0x2F203F40, 0x31402840,
-    0x28003100, 0x28002F00, 0x00003100,
-};
-
-static const CARD32 v_chroma[43] = {
-    0x36403000, 0x2D002CC0, 0x30003640, 0x2D0036C0,
-    0x35C02CC0, 0x37403000, 0x2C802D40, 0x30003540,
-    0x2D8037C0, 0x34C02C40, 0x38403000, 0x2BC02E00,
-    0x30003440, 0x2E2038C0, 0x34002B80, 0x39803000,
-    0x2B402E40, 0x30003380, 0x2E603A00, 0x33402B00,
-    0x3A803040, 0x2A802EA0, 0x30403300, 0x2EC03B40,
-    0x32802A40, 0x3C003040, 0x2A002EC0, 0x30803240,
-    0x2EC03C80, 0x320029C0, 0x3D403080, 0x29402F00,
-    0x308031C0, 0x2F203DC0, 0x31802900, 0x3E8030C0,
-    0x28802F40, 0x30C03140, 0x2F203F40, 0x31402840,
-    0x28003100, 0x28002F00, 0x00003100,
-};
 
 static Bool
 i830_tv_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
-		 DisplayModePtr adjusted_mode)
+		DisplayModePtr adjusted_mode)
 {
-    ScrnInfoPtr pScrn = output->scrn;
-    xf86CrtcConfigPtr   xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
-    int i;
-
-    for (i = 0; i < xf86_config->num_output; i++) {
-	xf86OutputPtr other_output = xf86_config->output[i];
-
-	if (other_output != output && other_output->crtc == output->crtc) {
-	    xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
-		       "Can't enable TV and another output on the same "
-		       "pipe\n");
-	    return FALSE;
+	ScrnInfoPtr pScrn = output->scrn;
+	xf86CrtcConfigPtr   xf86_config = XF86_CRTC_CONFIG_PTR(pScrn);
+	int i;
+
+	for (i = 0; i < xf86_config->num_output; i++) {
+		xf86OutputPtr other_output = xf86_config->output[i];
+
+		if (other_output != output && other_output->crtc == output->crtc) {
+			xf86DrvMsg(pScrn->scrnIndex, X_ERROR,
+					"Can't enable TV and another output on the same "
+					"pipe\n");
+			return FALSE;
+		}
 	}
-    }
 
-    /* XXX: fill me in */
+	/* XXX: fill me in */
 
-    return TRUE;
+	return TRUE;
 }
 
 static CARD32
@@ -633,10 +933,10 @@ i830_float_to_csc (float fin)
     CARD32  mant;
     CARD32  ret;
     float   f = fin;
-    
+
     /* somehow the color conversion knows the signs of all the values */
     if (f < 0) f = -f;
-    
+
     if (f >= 1)
     {
 	exp = 0x7;
@@ -665,7 +965,7 @@ i830_float_to_luma (float f)
 
 static void
 i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
-		 DisplayModePtr adjusted_mode)
+		DisplayModePtr adjusted_mode)
 {
     ScrnInfoPtr		    pScrn = output->scrn;
     I830Ptr		    pI830 = I830PTR(pScrn);
@@ -674,53 +974,52 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
     I830CrtcPrivatePtr	    intel_crtc = crtc->driver_private;
     struct i830_tv_priv	    *dev_priv = intel_output->dev_priv;
     const tv_mode_t	    *tv_mode;
-    CARD32		    tv_ctl, tv_filter_ctl;
+    CARD32		    tv_ctl;
     CARD32		    hctl1, hctl2, hctl3;
     CARD32		    vctl1, vctl2, vctl3, vctl4, vctl5, vctl6, vctl7;
     CARD32		    scctl1, scctl2, scctl3;
-    int			    i;
+    int			    i, j;
     const video_levels_t	*video_levels;
     const color_conversion_t	*color_conversion;
-    Bool		    burst_ena;
-
-    /* Need to actually choose or construct the appropriate
-     * mode.  For now, just set the first one in the list, with
-     * NTSC format.
-     */
-    tv_mode = &tv_modes[0];
-    
+    Bool burst_ena;
+    for (i = 0; i < sizeof(tv_modes) / sizeof (tv_modes[0]); i++) {
+	tv_mode = &tv_modes[i];
+	if (strstr(mode->name, tv_mode->name))
+	    break;	
+    }
     tv_ctl = 0;
 
     switch (dev_priv->type) {
-    default:
-    case TV_TYPE_UNKNOWN:
-    case TV_TYPE_COMPOSITE:
-	tv_ctl |= TV_ENC_OUTPUT_COMPOSITE;
-	video_levels = &tv_mode->composite_levels;
-	color_conversion = &tv_mode->composite_color;
-	burst_ena = tv_mode->burst_ena;
-	break;
-    case TV_TYPE_COMPONENT:
-	tv_ctl |= TV_ENC_OUTPUT_COMPONENT;
-	video_levels = &component_level;
-	if (tv_mode->burst_ena)
-	    color_conversion = &sdtv_component_color;
-	else
-	    color_conversion = &hdtv_component_color;
-	burst_ena = FALSE;
-	break;
-    case TV_TYPE_SVIDEO:
-	tv_ctl |= TV_ENC_OUTPUT_SVIDEO;
-	video_levels = &tv_mode->svideo_levels;
-	color_conversion = &tv_mode->svideo_color;
-	burst_ena = tv_mode->burst_ena;
-	break;
+	default:
+	case TV_TYPE_UNKNOWN:
+	case TV_TYPE_COMPOSITE:
+	    tv_ctl |= TV_ENC_OUTPUT_COMPOSITE;
+	    video_levels = &tv_mode->composite_levels;
+	    color_conversion = &tv_mode->composite_color;
+	    burst_ena = tv_mode->burst_ena;
+	    break;
+	case TV_TYPE_COMPONENT:
+	    tv_ctl |= TV_ENC_OUTPUT_COMPONENT;
+	    video_levels = &component_level;
+	    if (tv_mode->burst_ena)
+		color_conversion = &sdtv_component_color;
+	    else
+		color_conversion = &hdtv_component_color;
+	    burst_ena = FALSE;
+	    break;
+	case TV_TYPE_SVIDEO:
+	    tv_ctl |= TV_ENC_OUTPUT_SVIDEO;
+	    video_levels = &tv_mode->svideo_levels;
+	    color_conversion = &tv_mode->svideo_color;
+	    burst_ena = tv_mode->burst_ena;
+	    break;
     }
     hctl1 = (tv_mode->hsync_end << TV_HSYNC_END_SHIFT) |
 	(tv_mode->htotal << TV_HTOTAL_SHIFT);
 
     hctl2 = (tv_mode->hburst_start << 16) |
 	(tv_mode->hburst_len << TV_HBURST_LEN_SHIFT);
+
     if (burst_ena)
 	hctl2 |= TV_BURST_ENA;
 
@@ -738,6 +1037,7 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
     vctl3 = (tv_mode->veq_len << TV_VEQ_LEN_SHIFT) |
 	(tv_mode->veq_start_f1 << TV_VEQ_START_F1_SHIFT) |
 	(tv_mode->veq_start_f2 << TV_VEQ_START_F2_SHIFT);
+
     if (tv_mode->veq_ena)
 	vctl3 |= TV_EQUAL_ENA;
 
@@ -755,21 +1055,24 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
 
     if (intel_crtc->pipe == 1)
 	tv_ctl |= TV_ENC_PIPEB_SELECT;
-
     tv_ctl |= tv_mode->oversample;
+
     if (tv_mode->progressive)
 	tv_ctl |= TV_PROGRESSIVE;
+    if (tv_mode->trilevel_sync)
+	tv_ctl |= TV_TRILEVEL_SYNC;
     if (tv_mode->pal_burst)
 	tv_ctl |= TV_PAL_BURST;
+    scctl1 = 0;
+    if (tv_mode->dda1_inc)
+	scctl1 |= TV_SC_DDA1_EN;
 
-    scctl1 = TV_SC_DDA1_EN;
-    
     if (tv_mode->dda2_inc)
 	scctl1 |= TV_SC_DDA2_EN;
-    
+
     if (tv_mode->dda3_inc)
 	scctl1 |= TV_SC_DDA3_EN;
-    
+
     scctl1 |= tv_mode->sc_reset;
     scctl1 |= video_levels->burst << TV_BURST_LEVEL_SHIFT;
     scctl1 |= tv_mode->dda1_inc << TV_SCDDA1_INC_SHIFT;
@@ -784,10 +1087,6 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
     if (pI830->PciInfo->chipType < PCI_CHIP_I945_G)
 	tv_ctl |= TV_ENC_C0_FIX | TV_ENC_SDP_FIX;
 
-    tv_filter_ctl = TV_AUTO_SCALE;
-    if (mode->HDisplay > 1024)
-	tv_ctl |= TV_V_FILTER_BYPASS;
-
     OUTREG(TV_H_CTL_1, hctl1);
     OUTREG(TV_H_CTL_2, hctl2);
     OUTREG(TV_H_CTL_3, hctl3);
@@ -801,183 +1100,113 @@ i830_tv_mode_set(xf86OutputPtr output, DisplayModePtr mode,
     OUTREG(TV_SC_CTL_1, scctl1);
     OUTREG(TV_SC_CTL_2, scctl2);
     OUTREG(TV_SC_CTL_3, scctl3);
-    
+
     OUTREG(TV_CSC_Y,
-	   (i830_float_to_csc(color_conversion->ry) << 16) |
-	   (i830_float_to_csc(color_conversion->gy)));
+	    (i830_float_to_csc(color_conversion->ry) << 16) |
+	    (i830_float_to_csc(color_conversion->gy)));
     OUTREG(TV_CSC_Y2,
 	    (i830_float_to_csc(color_conversion->by) << 16) |
 	    (i830_float_to_luma(color_conversion->ay)));
-	   
+
     OUTREG(TV_CSC_U,
-	   (i830_float_to_csc(color_conversion->ru) << 16) |
-	   (i830_float_to_csc(color_conversion->gu)));
+	    (i830_float_to_csc(color_conversion->ru) << 16) |
+	    (i830_float_to_csc(color_conversion->gu)));
 
     OUTREG(TV_CSC_U2,
 	    (i830_float_to_csc(color_conversion->bu) << 16) |
 	    (i830_float_to_luma(color_conversion->au)));
-	   
+
     OUTREG(TV_CSC_V,
-	   (i830_float_to_csc(color_conversion->rv) << 16) |
-	   (i830_float_to_csc(color_conversion->gv)));
+	    (i830_float_to_csc(color_conversion->rv) << 16) |
+	    (i830_float_to_csc(color_conversion->gv)));
 
     OUTREG(TV_CSC_V2,
 	    (i830_float_to_csc(color_conversion->bv) << 16) |
 	    (i830_float_to_luma(color_conversion->av)));
-	   
-    OUTREG(TV_CLR_KNOBS, 0x00606000);
+
+    OUTREG(TV_CLR_KNOBS, 0x10606000);
     OUTREG(TV_CLR_LEVEL, ((video_levels->black << TV_BLACK_LEVEL_SHIFT) |
-			  (video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
-    
-    OUTREG(TV_WIN_POS, 0x00360024);
-    OUTREG(TV_WIN_SIZE, 0x02640198);
-    
-    OUTREG(TV_FILTER_CTL_1, 0x8000085E);
-    OUTREG(TV_FILTER_CTL_2, 0x00017878);
-    OUTREG(TV_FILTER_CTL_3, 0x0000BC3C);
+		(video_levels->blank << TV_BLANK_LEVEL_SHIFT)));
+    {
+	int pipeconf_reg = (intel_crtc->pipe == 0)?PIPEACONF:PIPEBCONF;
+	int dspcntr_reg = (intel_crtc->pipe == 0)?DSPACNTR : DSPBCNTR;
+	int pipeconf = INREG(pipeconf_reg);
+	int dspcntr = INREG(dspcntr_reg);
+	int dspbase_reg = (intel_crtc->pipe == 0) ? DSPABASE : DSPBBASE;
+	int xpos = 0x0, ypos = 0x0;
+	unsigned int xsize, ysize;
+	/* Pipe must be off here */
+	OUTREG(dspcntr_reg, dspcntr & ~DISPLAY_PLANE_ENABLE);
+	/* Flush the plane changes */
+	OUTREG(dspbase_reg, INREG(dspbase_reg));
+
+	if (!IS_I9XX(pI830)) {
+	    /* Wait for vblank for the disable to take effect */
+	    i830WaitForVblank(pScrn);
+	}
+
+	OUTREG(pipeconf_reg, pipeconf & ~PIPEACONF_ENABLE);
+	/* Wait for vblank for the disable to take effect. */
+	i830WaitForVblank(pScrn);
+
+	/* Filter ctl must be set before TV_WIN_SIZE */
+	OUTREG(TV_FILTER_CTL_1, TV_AUTO_SCALE); 
+	xsize = tv_mode->hblank_start - tv_mode->hblank_end;
+	if (tv_mode->progressive)
+	    ysize = tv_mode->nbr_end + 1;
+	else
+	    ysize = 2*tv_mode->nbr_end + 1;
+
+	OUTREG(TV_WIN_POS, (xpos<<16)|ypos);
+	OUTREG(TV_WIN_SIZE, (xsize<<16)|ysize);
+
+	OUTREG(pipeconf_reg, pipeconf);
+	OUTREG(dspcntr_reg, dspcntr);
+	/* Flush the plane changes */
+	OUTREG(dspbase_reg, INREG(dspbase_reg));
+    } 	
+
+    j = 0;
     for (i = 0; i < 60; i++)
-	OUTREG(TV_H_LUMA_0 + (i <<2), h_luma[i]);
+	OUTREG(TV_H_LUMA_0 + (i<<2), tv_mode->filter_table[j++]);
     for (i = 0; i < 60; i++)
-	OUTREG(TV_H_CHROMA_0 + (i <<2), h_chroma[i]);
+	OUTREG(TV_H_CHROMA_0 + (i<<2), tv_mode->filter_table[j++]);
     for (i = 0; i < 43; i++)
-	OUTREG(TV_V_LUMA_0 + (i <<2), v_luma[i]);
+	OUTREG(TV_V_LUMA_0 + (i<<2), tv_mode->filter_table[j++]);
     for (i = 0; i < 43; i++)
-	OUTREG(TV_V_CHROMA_0 + (i <<2), v_chroma[i]);
-
+	OUTREG(TV_V_CHROMA_0 + (i<<2), tv_mode->filter_table[j++]);
     OUTREG(TV_DAC, 0);
     OUTREG(TV_CTL, tv_ctl);
 }
 
 static const DisplayModeRec reported_modes[] = {
-	{
-		.name = "NTSC 480i",
-		.Clock = TV_PLL_CLOCK,
-		.HDisplay   = 1280,
-		.HSyncStart = 1368,
-		.HSyncEnd   = 1496,
-		.HTotal     = 1712,
-
-		.VDisplay   = 1024,
-		.VSyncStart = 1027,
-		.VSyncEnd   = 1034,
-		.VTotal     = 1104,
-		.type       = M_T_DRIVER
-	},
-	{
-		.name = "NTSC 480i",
-		.Clock = TV_PLL_CLOCK,
-		.HDisplay   = 1024,
-		.HSyncStart = 1080,
-		.HSyncEnd   = 1184,
-		.HTotal     = 1344,
-
-		.VDisplay   = 768,
-		.VSyncStart = 771,
-		.VSyncEnd   = 777,
-		.VTotal     = 806,
-		.type       = M_T_DRIVER
-	},
-	{
-		.name = "NTSC 480i",
-		.Clock = TV_PLL_CLOCK,
-		.HDisplay   = 800,
-		.HSyncStart = 832,
-		.HSyncEnd   = 912,
-		.HTotal     = 1024,
-
-		.VDisplay   = 600,
-		.VSyncStart = 603,
-		.VSyncEnd   = 607,
-		.VTotal     = 650,
-		.type       = M_T_DRIVER
-	},
-	{
-		.name = "NTSC 480i",
-		.Clock = TV_PLL_CLOCK,
-		.HDisplay   = 640,
-		.HSyncStart = 664,
-		.HSyncEnd   = 720,
-		.HTotal     = 800,
-
-		.VDisplay   = 480,
-		.VSyncStart = 483,
-		.VSyncEnd   = 487,
-		.VTotal     = 552,
-		.type       = M_T_DRIVER
-	},
-	{
-		.name = "PAL 576i",
-		.Clock = TV_PLL_CLOCK,
-		.HDisplay   = 1280,
-		.HSyncStart = 1352,
-		.HSyncEnd   = 1480,
-		.HTotal     = 1680,
-
-		.VDisplay   = 1024,
-		.VSyncStart = 1027,
-		.VSyncEnd   = 1034,
-		.VTotal     = 1092,
-
-		.type       = M_T_DRIVER
-	},
-	{
-		.name = "PAL 576i",
-		.Clock = TV_PLL_CLOCK,
-		.HDisplay   = 1024,
-		.HSyncStart = 1072,
-		.HSyncEnd   = 1168,
-		.HTotal     = 1312,
-		.VDisplay   = 768,
-		.VSyncStart = 771,
-		.VSyncEnd   = 775,
-		.VTotal     = 820,
-		.VRefresh   = 50.0f,
-
-		.type       = M_T_DRIVER
-	},
-	{
-		.name = "PAL 576i",
-		.Clock = TV_PLL_CLOCK,
-		.HDisplay   = 800,
-		.HSyncStart = 832,
-		.HSyncEnd   = 904,
-		.HTotal     = 1008,
-		.VDisplay   = 600,
-		.VSyncStart = 603,
-		.VSyncEnd   = 607,
-		.VTotal     = 642,
-		.VRefresh   = 50.0f,
-
-		.type       = M_T_DRIVER
-	},
-	{
-		.name = "PAL 576i",
-		.Clock = TV_PLL_CLOCK,
-		.HDisplay   = 640,
-		.HSyncStart = 664,
-		.HSyncEnd   = 720,
-		.HTotal     = 800,
-
-		.VDisplay   = 480,
-		.VSyncStart = 483,
-		.VSyncEnd   = 487,
-		.VTotal     = 516,
-		.VRefresh   = 50.0f,
-		.type       = M_T_DRIVER
-	},
+    {
+	.name = "NTSC 480i",
+	.Clock = 107520,
+	.HDisplay   = 1280,
+	.HSyncStart = 1368,
+	.HSyncEnd   = 1496,
+	.HTotal     = 1712,
+
+	.VDisplay   = 1024,
+	.VSyncStart = 1027,
+	.VSyncEnd   = 1034,
+	.VTotal     = 1104,
+	.type       = M_T_DRIVER
+    },
 };
 
 /**
  * Detects TV presence by checking for load.
  *
  * Requires that the current pipe's DPLL is active.
- 
+
  * \return TRUE if TV is connected.
  * \return FALSE if TV is disconnected.
  */
 static void
 i830_tv_detect_type (xf86CrtcPtr    crtc,
-		     xf86OutputPtr  output)
+		xf86OutputPtr  output)
 {
     ScrnInfoPtr		    pScrn = output->scrn;
     I830Ptr		    pI830 = I830PTR(pScrn);
@@ -1002,13 +1231,13 @@ i830_tv_detect_type (xf86CrtcPtr    crtc,
 	tv_ctl |= TV_TEST_MODE_MONITOR_DETECT;
 	tv_dac &= ~TVDAC_SENSE_MASK;
 	tv_dac |= (TVDAC_STATE_CHG_EN |
-		   TVDAC_A_SENSE_CTL |
-		   TVDAC_B_SENSE_CTL |
-		   TVDAC_C_SENSE_CTL |
-		   DAC_CTL_OVERRIDE |
-		   DAC_A_0_7_V |
-		   DAC_B_0_7_V |
-		   DAC_C_0_7_V);
+		TVDAC_A_SENSE_CTL |
+		TVDAC_B_SENSE_CTL |
+		TVDAC_C_SENSE_CTL |
+		DAC_CTL_OVERRIDE |
+		DAC_A_0_7_V |
+		DAC_B_0_7_V |
+		DAC_C_0_7_V);
 	OUTREG(TV_CTL, tv_ctl);
 	OUTREG(TV_DAC, tv_dac);
 	i830WaitForVblank(pScrn);
@@ -1024,22 +1253,22 @@ i830_tv_detect_type (xf86CrtcPtr    crtc,
      */
     if ((tv_dac & TVDAC_SENSE_MASK) == (TVDAC_B_SENSE | TVDAC_C_SENSE)) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		   "Detected Composite TV connection\n");
+		"Detected Composite TV connection\n");
 	type = TV_TYPE_COMPOSITE;
     } else if ((tv_dac & (TVDAC_A_SENSE|TVDAC_B_SENSE)) == TVDAC_A_SENSE) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		   "Detected S-Video TV connection\n");
+		"Detected S-Video TV connection\n");
 	type = TV_TYPE_SVIDEO;
     } else if ((tv_dac & TVDAC_SENSE_MASK) == 0) {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		   "Detected Component TV connection\n");
+		"Detected Component TV connection\n");
 	type = TV_TYPE_COMPONENT;
     } else {
 	xf86DrvMsg(pScrn->scrnIndex, X_INFO,
-		   "No TV connection detected\n");
+		"No TV connection detected\n");
 	type = TV_TYPE_NONE;
     }
-    
+
     dev_priv->type = type;
 }
 
@@ -1060,55 +1289,108 @@ i830_tv_detect(xf86OutputPtr output)
     crtc = i830GetLoadDetectPipe (output);
     if (crtc)
     {
-	if (intel_output->load_detect_temp)
-	{
-	    /* we only need the pixel clock set correctly here */
-	    mode = reported_modes[0];
-	    xf86SetModeCrtc (&mode, INTERLACE_HALVE_V);
-	    xf86CrtcSetMode (crtc, &mode, RR_Rotate_0, 0, 0);
-	}
-	i830_tv_detect_type (crtc, output);
-	i830ReleaseLoadDetectPipe (output);
+        if (intel_output->load_detect_temp)
+        {
+            /* we only need the pixel clock set correctly here */
+            mode = reported_modes[0];
+            xf86SetModeCrtc (&mode, INTERLACE_HALVE_V);
+	    crtc->funcs->mode_set(crtc, &mode, &mode, 0, 0);
+        }
+        i830_tv_detect_type (crtc, output);
+        i830ReleaseLoadDetectPipe (output);
     }
-    
+
     switch (dev_priv->type) {
     case TV_TYPE_NONE:
-	return XF86OutputStatusDisconnected;
+        return XF86OutputStatusDisconnected;
     case TV_TYPE_UNKNOWN:
-	return XF86OutputStatusUnknown;
+        return XF86OutputStatusUnknown;
     default:
-	return XF86OutputStatusConnected;
+        return XF86OutputStatusConnected;
     }
 }
 
+struct input_res {
+    char *name;
+    int w, h;	
+} input_res_table[] = 
+{
+	{"640x480", 640, 480},
+	{"800x600", 800, 600},
+	{"1024x768", 1024, 768},
+	{"1280x1024", 1280, 1024},
+	{"848x480", 848, 480},
+	{"1280x720", 1280, 720},
+};
+
 /**
  * Stub get_modes function.
  *
  * This should probably return a set of fixed modes, unless we can figure out
  * how to probe modes off of TV connections.
  */
+
 static DisplayModePtr
 i830_tv_get_modes(xf86OutputPtr output)
 {
-    ScrnInfoPtr	    pScrn = output->scrn;
-    I830Ptr	    pI830 = I830PTR(pScrn);
-    DisplayModePtr  new, first = NULL, *tail = &first;
-    int		    i;
-
-    (void) pI830;
+    DisplayModePtr  ret = NULL, mode_ptr;
+    int		    i, j;
+    I830OutputPrivatePtr    intel_output = output->driver_private;
+    struct i830_tv_priv	    *dev_priv = intel_output->dev_priv;
 
-    for (i = 0; i < sizeof (reported_modes) / sizeof (reported_modes[0]); i++)
+    for (i = 0; i < sizeof(tv_modes) / sizeof (tv_modes[0]); i++) 
     {
-	new             = xnfcalloc(1, sizeof (DisplayModeRec));
-
-	*new = reported_modes[i];
-	new->name = xnfalloc(strlen(reported_modes[i].name) + 1);
-	strcpy(new->name, reported_modes[i].name);
-	*tail = new;
-	tail = &new->next;
+	const tv_mode_t *tv_mode = &tv_modes[i];
+	unsigned int hactive = tv_mode->hblank_start - tv_mode->hblank_end;
+	unsigned int vactive = tv_mode->progressive
+	    ?tv_mode->nbr_end + 1: 2*(tv_mode->nbr_end + 1);
+	unsigned int htotal = tv_mode->htotal + 1;
+	unsigned int vtotal = tv_mode->progressive
+	    ?tv_mode->nbr_end + 1 + tv_mode->vi_end_f2:
+	    2*(tv_mode->nbr_end+1) + 2*(tv_mode->vi_end_f2);
+
+	if (dev_priv->type != TV_TYPE_COMPONENT && tv_mode->component_only)
+	    continue;
+
+	for (j = 0; j < sizeof(input_res_table)/sizeof(input_res_table[0]); j++)	{
+	    struct input_res *input = &input_res_table[j];
+	    unsigned int hactive_s = input->w;
+	    unsigned int vactive_s = input->h;
+	    unsigned int htotal_s = htotal*hactive_s/hactive;
+	    unsigned int vtotal_s = vtotal*vactive_s/vactive;
+	    if (tv_mode->max_srcw && input->w > tv_mode->max_srcw)
+		continue;
+	    if (input->w > 1024 && (!tv_mode->progressive 
+			&& !tv_mode->component_only))
+		continue;
+	    mode_ptr = xnfcalloc(1, sizeof(DisplayModeRec));
+	    mode_ptr->name = xnfalloc(strlen(tv_mode->name) + 
+		    strlen(input->name) + 4);
+	    sprintf(mode_ptr->name, "%s %s", tv_mode->name, input->name);
+
+	    mode_ptr->Clock = tv_mode->clock;
+
+	    mode_ptr->HDisplay = hactive_s;
+	    mode_ptr->HSyncStart = hactive_s + 1;
+	    mode_ptr->HSyncEnd = htotal_s - 20;  
+	    if ( mode_ptr->HSyncEnd <= mode_ptr->HSyncStart)
+		mode_ptr->HSyncEnd = mode_ptr->HSyncStart  + 1;
+	    mode_ptr->HTotal = htotal_s;
+
+	    mode_ptr->VDisplay = vactive_s;
+	    mode_ptr->VSyncStart = vactive_s + 1;
+	    mode_ptr->VSyncEnd = vtotal_s - 20;
+	    if ( mode_ptr->VSyncEnd <= mode_ptr->VSyncStart)
+		mode_ptr->VSyncEnd = mode_ptr->VSyncStart  + 1;
+	    mode_ptr->VTotal = vtotal_s;
+
+	    mode_ptr->type = M_T_DRIVER;
+	    mode_ptr->next = ret;
+	    ret = mode_ptr;
+	} 
     }
 
-    return first;
+    return ret;
 }
 
 static void
@@ -1138,7 +1420,7 @@ i830_tv_init(ScrnInfoPtr pScrn)
     I830OutputPrivatePtr    intel_output;
     struct i830_tv_priv	    *dev_priv;
     CARD32		    tv_dac_on, tv_dac_off, save_tv_dac;
- 
+
     if ((INREG(TV_CTL) & TV_FUSE_STATE_MASK) == TV_FUSE_STATE_DISABLED)
 	return;
 
@@ -1147,31 +1429,31 @@ i830_tv_init(ScrnInfoPtr pScrn)
      * DAC register holds a value
      */
     save_tv_dac = INREG(TV_DAC);
-    
+
     OUTREG(TV_DAC, save_tv_dac | TVDAC_STATE_CHG_EN);
     tv_dac_on = INREG(TV_DAC);
-    
+
     OUTREG(TV_DAC, save_tv_dac & ~TVDAC_STATE_CHG_EN);
     tv_dac_off = INREG(TV_DAC);
-    
+
     OUTREG(TV_DAC, save_tv_dac);
-    
+
     /*
      * If the register does not hold the state change enable
      * bit, (either as a 0 or a 1), assume it doesn't really
      * exist
      */
     if ((tv_dac_on & TVDAC_STATE_CHG_EN) == 0 || 
-	(tv_dac_off & TVDAC_STATE_CHG_EN) != 0)
+	    (tv_dac_off & TVDAC_STATE_CHG_EN) != 0)
 	return;
-    
+
     output = xf86OutputCreate (pScrn, &i830_tv_output_funcs, "TV");
-    
+
     if (!output)
 	return;
-    
+
     intel_output = xnfcalloc (sizeof (I830OutputPrivateRec) +
-			      sizeof (struct i830_tv_priv), 1);
+	    sizeof (struct i830_tv_priv), 1);
     if (!intel_output)
     {
 	xf86OutputDestroy (output);
@@ -1181,7 +1463,7 @@ i830_tv_init(ScrnInfoPtr pScrn)
     intel_output->type = I830_OUTPUT_TVOUT;
     intel_output->dev_priv = dev_priv;
     dev_priv->type = TV_TYPE_UNKNOWN;
-    
+
     output->driver_private = intel_output;
     output->interlaceAllowed = FALSE;
     output->doubleScanAllowed = FALSE;
diff --git a/src/i830_xf86Crtc.c b/src/i830_xf86Crtc.c
index a2099149..0ea0cedd 100644
--- a/src/i830_xf86Crtc.c
+++ b/src/i830_xf86Crtc.c
@@ -273,6 +273,7 @@ typedef enum {
     OPTION_DISABLE,
     OPTION_MIN_CLOCK,
     OPTION_MAX_CLOCK,
+    OPTION_IGNORE,
 } OutputOpts;
 
 static OptionInfoRec xf86OutputOptions[] = {
@@ -286,6 +287,7 @@ static OptionInfoRec xf86OutputOptions[] = {
     {OPTION_DISABLE,	    "Disable",		OPTV_BOOLEAN, {0}, FALSE },
     {OPTION_MIN_CLOCK,	    "MinClock",		OPTV_FREQ,    {0}, FALSE },
     {OPTION_MAX_CLOCK,	    "MaxClock",		OPTV_FREQ,    {0}, FALSE },
+    {OPTION_IGNORE,	    "Ignore",		OPTV_BOOLEAN, {0}, FALSE },
     {-1,		    NULL,		OPTV_NONE,    {0}, FALSE },
 };
 
@@ -296,6 +298,9 @@ xf86OutputSetMonitor (xf86OutputPtr output)
     static const char monitor_prefix[] = "monitor-";
     char    *monitor;
 
+    if (!output->name)
+	return;
+
     if (output->options)
 	xfree (output->options);
 
@@ -332,6 +337,12 @@ xf86OutputEnabled (xf86OutputPtr    output)
     return TRUE;
 }
 
+static Bool
+xf86OutputIgnored (xf86OutputPtr    output)
+{
+    return xf86ReturnOptValBool (output->options, OPTION_IGNORE, FALSE);
+}
+
 xf86OutputPtr
 xf86OutputCreate (ScrnInfoPtr		    scrn,
 		  const xf86OutputFuncsRec *funcs,
@@ -339,20 +350,37 @@ xf86OutputCreate (ScrnInfoPtr		    scrn,
 {
     xf86OutputPtr	output, *outputs;
     xf86CrtcConfigPtr   xf86_config = XF86_CRTC_CONFIG_PTR(scrn);
-    int			len = strlen (name);
+    int			len;
+
+    if (name)
+	len = strlen (name) + 1;
+    else
+	len = 0;
 
-    output = xcalloc (sizeof (xf86OutputRec) + len + 1, 1);
+    output = xcalloc (sizeof (xf86OutputRec) + len, 1);
     if (!output)
 	return NULL;
     output->scrn = scrn;
     output->funcs = funcs;
-    output->name = (char *) (output + 1);
+    if (name)
+    {
+	output->name = (char *) (output + 1);
+	strcpy (output->name, name);
+    }
     output->subpixel_order = SubPixelUnknown;
-    strcpy (output->name, name);
 #ifdef RANDR_12_INTERFACE
     output->randr_output = NULL;
 #endif
-    xf86OutputSetMonitor (output);
+    if (name)
+    {
+	xf86OutputSetMonitor (output);
+	if (xf86OutputIgnored (output))
+	{
+	    xfree (output);
+	    return FALSE;
+	}
+    }
+    
     
     if (xf86_config->output)
 	outputs = xrealloc (xf86_config->output,
@@ -374,17 +402,19 @@ xf86OutputCreate (ScrnInfoPtr		    scrn,
 Bool
 xf86OutputRename (xf86OutputPtr output, const char *name)
 {
-    int	    len = strlen(name);
-    char    *newname = xalloc (len + 1);
+    int	    len = strlen(name) + 1;
+    char    *newname = xalloc (len);
     
     if (!newname)
 	return FALSE;	/* so sorry... */
     
     strcpy (newname, name);
-    if (output->name != (char *) (output + 1))
+    if (output->name && output->name != (char *) (output + 1))
 	xfree (output->name);
     output->name = newname;
     xf86OutputSetMonitor (output);
+    if (xf86OutputIgnored (output))
+	return FALSE;
     return TRUE;
 }
 
@@ -407,7 +437,7 @@ xf86OutputDestroy (xf86OutputPtr output)
 	    xf86_config->num_output--;
 	    break;
 	}
-    if (output->name != (char *) (output + 1))
+    if (output->name && output->name != (char *) (output + 1))
 	xfree (output->name);
     xfree (output);
 }
diff --git a/src/i965_render.c b/src/i965_render.c
index 266b461f..a2b21db1 100644
--- a/src/i965_render.c
+++ b/src/i965_render.c
@@ -948,44 +948,41 @@ i965_prepare_composite(int op, PicturePtr pSrcPicture,
 	    	 VB0_VERTEXDATA |
 	    	 ((4 * 2 * nelem) << VB0_BUFFER_PITCH_SHIFT));
    	OUT_RING(state_base_offset + vb_offset);
-   	OUT_RING(2); // max index, prim has 4 coords
+        OUT_RING(3);
    	OUT_RING(0); // ignore for VERTEXDATA, but still there
 
 	/* Set up our vertex elements, sourced from the single vertex buffer.
 	 */
    	OUT_RING(BRW_3DSTATE_VERTEX_ELEMENTS | ((2 * nelem) - 1));
-	/* offset 0: X,Y -> {X, Y, 1.0, 1.0} */
    	OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
 	    	 VE0_VALID |
 	    	 (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
 	    	 (0 << VE0_OFFSET_SHIFT));
    	OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
 	    	 (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
-	     	 (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
-	    	 (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
+	     	 (BRW_VFCOMPONENT_NOSTORE << VE1_VFCOMPONENT_2_SHIFT) |
+	    	 (BRW_VFCOMPONENT_NOSTORE << VE1_VFCOMPONENT_3_SHIFT) |
 	    	 (0 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
-	/* offset 8: S0, T0 -> {S0, T0, 1.0, 1.0} */
-   	OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
-	    	 VE0_VALID |
-	    	 (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
-	    	 (8 << VE0_OFFSET_SHIFT));
-   	OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
-	    	 (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
-	    	 (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
-	     	 (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
-	    	 (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
-
    	if (pMask) {
 	    OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
 		     VE0_VALID |
 		     (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
-		     (16 << VE0_OFFSET_SHIFT));
+		     (8 << VE0_OFFSET_SHIFT));
 	    OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
 		     (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
-		     (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
-		     (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
-		     (8 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
+		     (BRW_VFCOMPONENT_NOSTORE << VE1_VFCOMPONENT_2_SHIFT) |
+		     (BRW_VFCOMPONENT_NOSTORE << VE1_VFCOMPONENT_3_SHIFT) |
+		     (2 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT));
    	}
+   	OUT_RING((0 << VE0_VERTEX_BUFFER_INDEX_SHIFT) |
+	    	 VE0_VALID |
+	    	 (BRW_SURFACEFORMAT_R32G32_FLOAT << VE0_FORMAT_SHIFT) |
+	    	 ((pMask?16:8) << VE0_OFFSET_SHIFT)); /* offset vb in bytes */
+   	OUT_RING((BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_0_SHIFT) |
+	    	 (BRW_VFCOMPONENT_STORE_SRC << VE1_VFCOMPONENT_1_SHIFT) |
+	    	 (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_2_SHIFT) |
+	    	 (BRW_VFCOMPONENT_STORE_1_FLT << VE1_VFCOMPONENT_3_SHIFT) |
+	    	 (4 << VE1_DESTINATION_ELEMENT_OFFSET_SHIFT)); /* VUE offset in dwords */
 
    	ADVANCE_LP_RING();
     }