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authorZhenyu Wang <zhenyu.z.wang@intel.com>2008-07-15 13:29:33 +0800
committerZhenyu Wang <zhenyu.z.wang@intel.com>2008-07-21 11:13:50 +0800
commit607a68a81d28d49ebcb0f6a8b9267f1d85d7bac5 (patch)
tree694768542a158bdd67910785279f01f031f7e19a
parent5d0f981ee00fbcdee44d38d94acfd2c68f9082d3 (diff)
move FBC register dump out of display registers
This makes it easier to read. (cherry picked from commit 0c67219d0e6cfc858af2eb375c2f9473d0f6db60)
-rw-r--r--src/i830_debug.c18
1 files changed, 9 insertions, 9 deletions
diff --git a/src/i830_debug.c b/src/i830_debug.c
index 88300504..00f18e50 100644
--- a/src/i830_debug.c
+++ b/src/i830_debug.c
@@ -537,15 +537,6 @@ static struct i830SnapshotRec {
DEFINEREG2(PIPEASRC, i830_debug_yxminus1),
DEFINEREG2(PIPEASTAT, i830_debug_pipestat),
- DEFINEREG(FBC_CFB_BASE),
- DEFINEREG(FBC_LL_BASE),
- DEFINEREG(FBC_CONTROL),
- DEFINEREG(FBC_COMMAND),
- DEFINEREG(FBC_STATUS),
- DEFINEREG(FBC_CONTROL2),
- DEFINEREG(FBC_FENCE_OFF),
- DEFINEREG(FBC_MOD_NUM),
-
DEFINEREG2(FPA0, i830_debug_fp),
DEFINEREG2(FPA1, i830_debug_fp),
DEFINEREG2(DPLL_A, i830_debug_dpll),
@@ -623,6 +614,15 @@ static struct i830SnapshotRec {
DEFINEREG(TV_H_CHROMA_0),
DEFINEREG(TV_H_CHROMA_59),
+ DEFINEREG(FBC_CFB_BASE),
+ DEFINEREG(FBC_LL_BASE),
+ DEFINEREG(FBC_CONTROL),
+ DEFINEREG(FBC_COMMAND),
+ DEFINEREG(FBC_STATUS),
+ DEFINEREG(FBC_CONTROL2),
+ DEFINEREG(FBC_FENCE_OFF),
+ DEFINEREG(FBC_MOD_NUM),
+
DEFINEREG(MI_MODE),
/* DEFINEREG(MI_DISPLAY_POWER_DOWN), CRL only */
DEFINEREG(MI_ARB_STATE),