diff options
| author | Chris Wilson <chris@chris-wilson.co.uk> | 2013-07-30 17:38:23 +0100 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2013-07-30 23:02:50 +0100 |
| commit | 493763301e995d02cb838d14348da46dd26444af (patch) | |
| tree | 7389f1f2b4db12a19787eac6cf1164fa7786c443 /configure.ac | |
| parent | cdbc097796b24ab42b60c49d9885a35573c96a89 (diff) | |
sna: Allow CPU access to scanouts if WT cached
On Iris, we may store the framebuffer in the eLLC/LLC and mark it as
being Write-Through cached. This means that we can treat it as being
cached for read accesses (either by the GPU or CPU), but must be careful
to still not write directly to the scanout with the CPU (only the GPU
writes are cached and coherent with the display).
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'configure.ac')
| -rw-r--r-- | configure.ac | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/configure.ac b/configure.ac index 0ae1c40a..d5705b96 100644 --- a/configure.ac +++ b/configure.ac @@ -362,6 +362,16 @@ if test "x$ASYNC_SWAP" = xyes; then AC_DEFINE(USE_ASYNC_SWAP,1,[Assume asynchronous swap support]) fi +AC_ARG_ENABLE(wt, + AS_HELP_STRING([--enable-wt], + [Enable use of WT cacheing (experimental) [default=no]]), + [WT="$enableval"], + [WT=no]) +AM_CONDITIONAL(USE_WT, test x$WT = xyes) +if test "x$WT" = xyes; then + AC_DEFINE(USE_WT,1,[Assume WriteThrough cacheing support]) +fi + AC_ARG_ENABLE(debug, AS_HELP_STRING([--enable-debug], [Enables internal debugging [default=no]]), |