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authorEric Anholt <eric@anholt.net>2007-03-13 17:07:10 -0700
committerEric Anholt <eric@anholt.net>2007-03-13 17:07:10 -0700
commit66fdb08c83d353fbe4e917900c54b555c869eb80 (patch)
treee7f4fec6ff189437d90a3f639373d80f590fcc84 /src/ch7xxx
parent44708bdd9ebfef0328302c9a964b80deb46e57c6 (diff)
Refine the i855 LVDS clock code. In particular, p2 is always 14.
This gets correct clocks detected on most harware. The SSC is always assumed to be 66Mhz, which may not be true, but we'll fix that when we find example hardware.
Diffstat (limited to 'src/ch7xxx')
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