summaryrefslogtreecommitdiff
path: root/src/common.h
diff options
context:
space:
mode:
authorZhenyu Wang <zhenyuw@linux.intel.com>2009-09-08 00:56:34 +0800
committerZhenyu Wang <zhenyuw@linux.intel.com>2009-09-08 00:56:34 +0800
commitce10b5b6fca086eb4af45c1db28352e06ee4ce0b (patch)
treef3cc511b0875bd5648cfdcc01e1f2f0e8e93136d /src/common.h
parent94fc93d4e2b88565dca17f72903d8991213c9ee8 (diff)
Add B43 chipset support
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'src/common.h')
-rw-r--r--src/common.h7
1 files changed, 6 insertions, 1 deletions
diff --git a/src/common.h b/src/common.h
index 69f56041..79c656a5 100644
--- a/src/common.h
+++ b/src/common.h
@@ -310,6 +310,11 @@ extern int I810_DEBUG;
#define PCI_CHIP_G41_G_BRIDGE 0x2E30
#endif
+#ifndef PCI_CHIP_B43_G
+#define PCI_CHIP_B43_G 0x2E42
+#define PCI_CHIP_B43_G_BRIDGE 0x2E40
+#endif
+
#ifndef PCI_CHIP_IGDNG_D_G
#define PCI_CHIP_IGDNG_D_G 0x0042
#define PCI_CHIP_IGDNG_D_G_BRIDGE 0x0040
@@ -346,7 +351,7 @@ extern int I810_DEBUG;
#define IS_IGDG(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGD_G)
#define IS_IGD(pI810) (IS_IGDG(pI810) || IS_IGDGM(pI810))
#define IS_GM45(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_GM45_GM)
-#define IS_G4X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGD_E_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G45_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q45_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G41_G || IS_GM45(pI810))
+#define IS_G4X(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGD_E_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G45_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_Q45_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_G41_G || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_B43_G || IS_GM45(pI810))
#define IS_I965GM(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GM || DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_GME)
#define IS_965_Q(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_I965_Q)
#define IS_IGDNG_D(pI810) (DEVICE_ID(pI810->PciInfo) == PCI_CHIP_IGDNG_D_G)