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authorDaniel Vetter <daniel.vetter@ffwll.ch>2009-10-26 13:15:24 +0000
committerEric Anholt <eric@anholt.net>2009-11-05 14:22:59 -0800
commitd0e08fe611681fcc840d1b9ee8d49acdf50f7e58 (patch)
tree6e660d81145f597471f6551d7c6f2a3dd4ef9ba6 /src/common.h
parent8ff2a6496413e6b12fad9352f4bd9b6736bda56c (diff)
Kill some more #defines only needed for User-Modesetting
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch> Signed-off-by: Eric Anholt <eric@anholt.net>
Diffstat (limited to 'src/common.h')
-rw-r--r--src/common.h7
1 files changed, 0 insertions, 7 deletions
diff --git a/src/common.h b/src/common.h
index 5bc79e5c..b9269b5a 100644
--- a/src/common.h
+++ b/src/common.h
@@ -366,12 +366,6 @@ extern int I810_DEBUG;
#define IS_I915(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_G33CLASS(pI810))
#define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810) || IS_GM45(pI810) || IS_IGD(pI810) || IS_IGDNG_M(pI810))
-/* mark chipsets for using gfx VM offset for overlay */
-#define OVERLAY_NOPHYSICAL(pI810) (IS_G33CLASS(pI810) || IS_I965G(pI810))
-/* mark chipsets without overlay hw */
-#define OVERLAY_NOEXIST(pI810) (IS_G4X(pI810) || IS_IGDNG(pI810))
-/* dsparb controlled by hw only */
-#define DSPARB_HWCONTROL(pI810) (IS_G4X(pI810) || IS_IGDNG(pI810))
/* supports Y tiled surfaces (pre-965 Mesa isn't ready yet) */
#define SUPPORTS_YTILING(pI810) (IS_I965G(intel))
@@ -385,7 +379,6 @@ extern int I810_DEBUG;
#define MAX_SCRATCH_BUFFER_SIZE KB(64)
#define HWCURSOR_SIZE GTT_PAGE_SIZE
#define HWCURSOR_SIZE_ARGB GTT_PAGE_SIZE * 4
-#define OVERLAY_SIZE GTT_PAGE_SIZE
/* Use a 64x64 HW cursor */
#define I810_CURSOR_X 64