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authorZhenyu Wang <zhenyu.z.wang@intel.com>2007-07-20 15:18:48 +0800
committerZhenyu Wang <zhenyu.z.wang@intel.com>2007-07-20 15:18:48 +0800
commitb1af2c0e01c54ef1d40fd0ca1ede29a1dd7ed97b (patch)
tree07e92483e773e5c659f90d33ab1f4695c4577e97 /src/common.h
parentc7920a0e819308762fca3d6fc7ab194bd565b06a (diff)
Fix device id info for 945GME, 965GME
which do have new host bridge ids
Diffstat (limited to 'src/common.h')
-rw-r--r--src/common.h12
1 files changed, 10 insertions, 2 deletions
diff --git a/src/common.h b/src/common.h
index cc07e491..fa96a5d0 100644
--- a/src/common.h
+++ b/src/common.h
@@ -331,10 +331,14 @@ extern int I810_DEBUG;
#ifndef PCI_CHIP_I945_GM
#define PCI_CHIP_I945_GM 0x27A2
-#define PCI_CHIP_I945_GME 0x27AE
#define PCI_CHIP_I945_GM_BRIDGE 0x27A0
#endif
+#ifndef PCI_CHIP_I945_GME
+#define PCI_CHIP_I945_GME 0x27AE
+#define PCI_CHIP_I945_GME_BRIDGE 0x27AC
+#endif
+
#ifndef PCI_CHIP_I965_G_1
#define PCI_CHIP_I965_G_1 0x2982
#define PCI_CHIP_I965_G_1_BRIDGE 0x2980
@@ -357,10 +361,14 @@ extern int I810_DEBUG;
#ifndef PCI_CHIP_I965_GM
#define PCI_CHIP_I965_GM 0x2A02
-#define PCI_CHIP_I965_GME 0x2A12
#define PCI_CHIP_I965_GM_BRIDGE 0x2A00
#endif
+#ifndef PCI_CHIP_I965_GME
+#define PCI_CHIP_I965_GME 0x2A12
+#define PCI_CHIP_I965_GME_BRIDGE 0x2A10
+#endif
+
#ifndef PCI_CHIP_G33_G
#define PCI_CHIP_G33_G 0x29C2
#define PCI_CHIP_G33_G_BRIDGE 0x29C0