diff options
author | Wang Zhenyu <zhenyu.z.wang@intel.com> | 2007-06-05 11:07:41 -0700 |
---|---|---|
committer | Eric Anholt <eric@anholt.net> | 2007-06-05 11:34:22 -0700 |
commit | f4c05973d391bdb0a9b0eadb155548310baa98fd (patch) | |
tree | 0e1f21768e1dfffdb0f06349780870c8df8ab563 /src/common.h | |
parent | 36fcaeb2ef94db5399071540bba106dec3db81d5 (diff) |
Add support for the G33, Q33, and Q35 chipsets.
These chipsets require that the hardware status page be referenced by an offset
in the GTT rather than a physical memory address, so the X Server allocates it
rather than the DRM.
Diffstat (limited to 'src/common.h')
-rw-r--r-- | src/common.h | 20 |
1 files changed, 19 insertions, 1 deletions
diff --git a/src/common.h b/src/common.h index c879333a..2369a750 100644 --- a/src/common.h +++ b/src/common.h @@ -361,6 +361,21 @@ extern int I810_DEBUG; #define PCI_CHIP_I965_GM_BRIDGE 0x2A00 #endif +#ifndef PCI_CHIP_G33_G +#define PCI_CHIP_G33_G 0x29C2 +#define PCI_CHIP_G33_G_BRIDGE 0x29C0 +#endif + +#ifndef PCI_CHIP_Q35_G +#define PCI_CHIP_Q35_G 0x29B2 +#define PCI_CHIP_Q35_G_BRIDGE 0x29B0 +#endif + +#ifndef PCI_CHIP_Q33_G +#define PCI_CHIP_Q33_G 0x29D2 +#define PCI_CHIP_Q33_G_BRIDGE 0x29D0 +#endif + #define IS_I810(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I810 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_DC100 || \ pI810->PciInfo->chipType == PCI_CHIP_I810_E) @@ -378,7 +393,10 @@ extern int I810_DEBUG; #define IS_I945GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I945_GM || pI810->PciInfo->chipType == PCI_CHIP_I945_GME) #define IS_I965GM(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_GM || pI810->PciInfo->chipType == PCI_CHIP_I965_GME) #define IS_I965G(pI810) (pI810->PciInfo->chipType == PCI_CHIP_I965_G || pI810->PciInfo->chipType == PCI_CHIP_I965_G_1 || pI810->PciInfo->chipType == PCI_CHIP_I965_Q || pI810->PciInfo->chipType == PCI_CHIP_I946_GZ || pI810->PciInfo->chipType == PCI_CHIP_I965_GM || pI810->PciInfo->chipType == PCI_CHIP_I965_GME) -#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810)) +#define IS_G33CLASS(pI810) (pI810->PciInfo->chipType == PCI_CHIP_G33_G ||\ + pI810->PciInfo->chipType == PCI_CHIP_Q35_G ||\ + pI810->PciInfo->chipType == PCI_CHIP_Q33_G) +#define IS_I9XX(pI810) (IS_I915G(pI810) || IS_I915GM(pI810) || IS_I945G(pI810) || IS_I945GM(pI810) || IS_I965G(pI810) || IS_G33CLASS(pI810)) #define IS_MOBILE(pI810) (IS_I830(pI810) || IS_I85X(pI810) || IS_I915GM(pI810) || IS_I945GM(pI810) || IS_I965GM(pI810)) |