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authorZhenyu Wang <zhenyu.z.wang@intel.com>2008-09-11 16:14:47 +0800
committerZhenyu Wang <zhenyu.z.wang@intel.com>2008-09-11 16:14:47 +0800
commitec17c88a0ed7c9cf4ad68aa52a7a891946a1c0f4 (patch)
treed3506aa6674b150aa114ed3416567c0f94fab9ba /src/i810_driver.c
parentf9c625e1e5ddfff06b38fdd4e596fd8eae5934d5 (diff)
Add support for G41 chipset
G41 is another 4 series chipset like G45/43.
Diffstat (limited to 'src/i810_driver.c')
-rw-r--r--src/i810_driver.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/i810_driver.c b/src/i810_driver.c
index 856f5eca..a7f408c4 100644
--- a/src/i810_driver.c
+++ b/src/i810_driver.c
@@ -156,6 +156,7 @@ static const struct pci_id_match intel_device_match[] = {
INTEL_DEVICE_MATCH (PCI_CHIP_IGD_E_G, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_G45_G, 0 ),
INTEL_DEVICE_MATCH (PCI_CHIP_Q45_G, 0 ),
+ INTEL_DEVICE_MATCH (PCI_CHIP_G41_G, 0 ),
{ 0, 0, 0 },
};
@@ -212,6 +213,7 @@ static SymTabRec I810Chipsets[] = {
{PCI_CHIP_IGD_E_G, "Intel Integrated Graphics Device"},
{PCI_CHIP_G45_G, "G45/G43"},
{PCI_CHIP_Q45_G, "Q45/Q43"},
+ {PCI_CHIP_G41_G, "G41"},
{-1, NULL}
};
@@ -245,6 +247,7 @@ static PciChipsets I810PciChipsets[] = {
{PCI_CHIP_IGD_E_G, PCI_CHIP_IGD_E_G, RES_SHARED_VGA},
{PCI_CHIP_G45_G, PCI_CHIP_G45_G, RES_SHARED_VGA},
{PCI_CHIP_Q45_G, PCI_CHIP_Q45_G, RES_SHARED_VGA},
+ {PCI_CHIP_G41_G, PCI_CHIP_G41_G, RES_SHARED_VGA},
{-1, -1, RES_UNDEFINED }
};
@@ -812,6 +815,7 @@ I810Probe(DriverPtr drv, int flags)
case PCI_CHIP_IGD_E_G:
case PCI_CHIP_G45_G:
case PCI_CHIP_Q45_G:
+ case PCI_CHIP_G41_G:
xf86SetEntitySharable(usedChips[i]);
/* Allocate an entity private if necessary */