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authorAlan Hourihane <alanh@fairlite.demon.co.uk>2004-06-22 14:28:46 +0000
committerAlan Hourihane <alanh@fairlite.demon.co.uk>2004-06-22 14:28:46 +0000
commit5ed7e6f8424236dd57d83f6ab1282693260969cb (patch)
treed34b866b0e45776b9eeeafb7663ba85c78853037 /src/i810_reg.h
parenta46e95722d3c2b9dfb9eacf9a390a7c47d427773 (diff)
i915 support
Dual Head support for i830, i855, i915. ARGB cursor support (including i810) for all chipsets.
Diffstat (limited to 'src/i810_reg.h')
-rw-r--r--src/i810_reg.h29
1 files changed, 28 insertions, 1 deletions
diff --git a/src/i810_reg.h b/src/i810_reg.h
index c935982a..eac71ba9 100644
--- a/src/i810_reg.h
+++ b/src/i810_reg.h
@@ -209,6 +209,14 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define CURSOR_SIZE_HSHIFT 0
#define CURSOR_SIZE_VSHIFT 12
+#define CURSOR_B_CONTROL 0x700C0
+#define CURSOR_B_BASE 0x700C4
+#define CURSOR_B_POSITION 0x700C8
+#define CURSOR_B_PALETTE0 0x700D0
+#define CURSOR_B_PALETTE1 0x700D4
+#define CURSOR_B_PALETTE2 0x700D8
+#define CURSOR_B_PALETTE3 0x700DC
+
/* Similar registers exist in Device 0 on the i810 (pp55-65), but I'm
* not sure they refer to local (graphics) memory.
@@ -358,6 +366,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define FENCE 0x2000
#define FENCE_NR 8
+#define I915G_FENCE_START_MASK 0x0ff00000
+
#define I830_FENCE_START_MASK 0x07f80000
#define FENCE_START_MASK 0x03F80000
@@ -372,7 +382,14 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define FENCE_SIZE_16M 0x00000500
#define FENCE_SIZE_32M 0x00000600
#define FENCE_SIZE_64M 0x00000700
-#define FENCE_PITCH_MASK 0x00000070
+#define I915G_FENCE_SIZE_1M 0x00000000
+#define I915G_FENCE_SIZE_2M 0x00000100
+#define I915G_FENCE_SIZE_4M 0x00000200
+#define I915G_FENCE_SIZE_8M 0x00000300
+#define I915G_FENCE_SIZE_16M 0x00000400
+#define I915G_FENCE_SIZE_32M 0x00000500
+#define I915G_FENCE_SIZE_64M 0x00000600
+#define I915G_FENCE_SIZE_128M 0x00000700
#define FENCE_PITCH_1 0x00000000
#define FENCE_PITCH_2 0x00000010
#define FENCE_PITCH_4 0x00000020
@@ -497,6 +514,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define BR13_RIGHT_TO_LEFT 0x40000000
#define BR13_LEFT_TO_RIGHT 0x00000000
#define BR13_MONO_TRANSPCY 0x20000000
+#define BR13_MONO_PATN_TRANS 0x10000000
#define BR13_USE_DYN_DEPTH 0x04000000
#define BR13_DYN_8BPP 0x00000000
#define BR13_DYN_16BPP 0x01000000
@@ -708,6 +726,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define PIPEBCONF 0x71008
#define PIPEBCONF_ENABLE (1<<31)
#define PIPEBCONF_DISABLE 0
+#define PIPEBCONF_DOUBLE_WIDE (1<<30)
+#define PIPEBCONF_DISABLE 0
#define PIPEBCONF_GAMMA (1<<24)
#define PIPEBCONF_PALETTE 0
@@ -747,6 +767,11 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define DSPBADDR DSPBBASE
#define DSPBSTRIDE 0x71188
+#define DSPAPOS 0x7018C /* reserved */
+#define DSPASIZE 0x70190
+#define DSPBPOS 0x7118C
+#define DSPBSIZE 0x71190
+
/* Various masks for reserved bits, etc. */
#define I830_FWATER1_MASK (~((1<<11)|(1<<10)|(1<<9)| \
(1<<8)|(1<<26)|(1<<25)|(1<<24)|(1<<5)|(1<<4)|(1<<3)| \
@@ -801,6 +826,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define I855_GMCH_GMS_STOLEN_8M (0x3 << 4)
#define I855_GMCH_GMS_STOLEN_16M (0x4 << 4)
#define I855_GMCH_GMS_STOLEN_32M (0x5 << 4)
+#define I915G_GMCH_GMS_STOLEN_48M (0x6 << 4)
+#define I915G_GMCH_GMS_STOLEN_64M (0x7 << 4)
#define I85X_CAPID 0x44
#define I85X_VARIANT_MASK 0x7