diff options
| author | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-01-09 21:27:42 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-01-09 21:27:42 +0800 |
| commit | 2f0c0427dc4113bac64cda07c6365df1f0637697 (patch) | |
| tree | 429649e41e436b2719936149de9138a084adb5df /src/i810_reg.h | |
| parent | 139e9affdd49dcbe08e260a0a2bd001de16566e6 (diff) | |
Update PIPELINE_SELECT instruction and surface state format for new chipset
Diffstat (limited to 'src/i810_reg.h')
| -rw-r--r-- | src/i810_reg.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/i810_reg.h b/src/i810_reg.h index 26f9db48..bed3901e 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -2284,6 +2284,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define BRW_STATE_SIP BRW_3D(0, 1, 2) #define BRW_PIPELINE_SELECT BRW_3D(0, 1, 4) +#define NEW_PIPELINE_SELECT BRW_3D(1, 1, 4) + #define BRW_MEDIA_STATE_POINTERS BRW_3D(2, 0, 0) #define BRW_MEDIA_OBJECT BRW_3D(2, 1, 0) |