diff options
| author | Wang Zhenyu <zhenyu.z.wang@intel.com> | 2007-06-05 11:07:41 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2007-06-05 11:34:22 -0700 |
| commit | f4c05973d391bdb0a9b0eadb155548310baa98fd (patch) | |
| tree | 0e1f21768e1dfffdb0f06349780870c8df8ab563 /src/i810_reg.h | |
| parent | 36fcaeb2ef94db5399071540bba106dec3db81d5 (diff) | |
Add support for the G33, Q33, and Q35 chipsets.
These chipsets require that the hardware status page be referenced by an offset
in the GTT rather than a physical memory address, so the X Server allocates it
rather than the DRM.
Diffstat (limited to 'src/i810_reg.h')
| -rw-r--r-- | src/i810_reg.h | 15 |
1 files changed, 10 insertions, 5 deletions
diff --git a/src/i810_reg.h b/src/i810_reg.h index 234d124f..8df664e0 100644 --- a/src/i810_reg.h +++ b/src/i810_reg.h @@ -525,6 +525,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define PGETBL_SIZE_512KB (0 << 1) #define PGETBL_SIZE_256KB (1 << 1) #define PGETBL_SIZE_128KB (2 << 1) +#define G33_PGETBL_SIZE_MASK (3 << 8) +#define G33_PGETBL_SIZE_1M (1 << 8) +#define G33_PGETBL_SIZE_2M (2 << 8) #define I830_PTE_BASE 0x10000 #define PTE_ADDRESS_MASK 0xfffff000 @@ -2076,12 +2079,12 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define I830_GMCH_MEM_64M 0x1 #define I830_GMCH_MEM_128M 0 -#define I830_GMCH_GMS_MASK 0x70 -#define I830_GMCH_GMS_DISABLED 0x00 +#define I830_GMCH_GMS_MASK 0xF0 +#define I830_GMCH_GMS_DISABLED 0x00 #define I830_GMCH_GMS_LOCAL 0x10 -#define I830_GMCH_GMS_STOLEN_512 0x20 -#define I830_GMCH_GMS_STOLEN_1024 0x30 -#define I830_GMCH_GMS_STOLEN_8192 0x40 +#define I830_GMCH_GMS_STOLEN_512 0x20 +#define I830_GMCH_GMS_STOLEN_1024 0x30 +#define I830_GMCH_GMS_STOLEN_8192 0x40 #define I830_RDRAM_CHANNEL_TYPE 0x03010 #define I830_RDRAM_ND(x) (((x) & 0x20) >> 5) @@ -2096,6 +2099,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. #define I855_GMCH_GMS_STOLEN_32M (0x5 << 4) #define I915G_GMCH_GMS_STOLEN_48M (0x6 << 4) #define I915G_GMCH_GMS_STOLEN_64M (0x7 << 4) +#define G33_GMCH_GMS_STOLEN_128M (0x8 << 4) +#define G33_GMCH_GMS_STOLEN_256M (0x9 << 4) #define I85X_CAPID 0x44 #define I85X_VARIANT_MASK 0x7 |