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authorJesse Barnes <jbarnes@virtuousgeek.org>2009-01-26 17:14:06 -0800
committerEric Anholt <eric@anholt.net>2009-01-27 14:33:43 -0800
commit8d4bc36fae50b09a73ba2cfab920adb32141a358 (patch)
tree509111af04c4094f685431997d2749987dc30a8b /src/i830.h
parent6c0ca1676bf60529dd331cc739abdf68fa9e918d (diff)
Support tiled back/depth on 915-class hardware with DRI2.
Set alignments, tile settings and flags correctly in the 2D driver to support tiled rendering. UXA's create pixmap function currently assumes the worst about the alignment constraints; that should probably be fixed. Some of the 1M alignment fixes could probably be done more cleanly as well.
Diffstat (limited to 'src/i830.h')
-rw-r--r--src/i830.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/i830.h b/src/i830.h
index 47941695..d9adfbfd 100644
--- a/src/i830.h
+++ b/src/i830.h
@@ -724,6 +724,7 @@ typedef struct _I830Rec {
enum last_3d *last_3d;
Bool use_drm_mode;
+ Bool kernel_exec_fencing;
#ifdef XF86DRM_MODE
drmmode_rec drmmode;
int drm_mm_init;
@@ -910,6 +911,9 @@ extern void i830WaitSync(ScrnInfoPtr pScrn);
/* i830_memory.c */
Bool i830_bind_all_memory(ScrnInfoPtr pScrn);
Bool i830_unbind_all_memory(ScrnInfoPtr pScrn);
+unsigned long i830_get_fence_size(I830Ptr pI830, unsigned long size);
+unsigned long i830_get_fence_pitch(I830Ptr pI830, unsigned long pitch, int format);
+unsigned long i830_get_fence_alignment(I830Ptr pI830, unsigned long size);
Bool I830BindAGPMemory(ScrnInfoPtr pScrn);
Bool I830UnbindAGPMemory(ScrnInfoPtr pScrn);