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| author | Hong Liu <hong.liu@intel.com> | 2008-06-04 16:56:50 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-06-04 16:56:50 +0800 |
| commit | c7fee208fd46e143965ea173984d284e1eec2a9b (patch) | |
| tree | 5f22d91e9a24a8a0f18b2c15498aa1088a13e8ce /src/i830.h | |
| parent | 64ccc8a036a1d80fc918e9b124d24ce0d26bdbbb (diff) | |
Fix DSPARB change on 965G
From the spec, only 965GM and IGD_GM have 128 FIFO entries.
With DSPARB change introduced by commit bd137a, I've got PIPE B
underrun when dual-headed on G35 platform.
Diffstat (limited to 'src/i830.h')
0 files changed, 0 insertions, 0 deletions