summaryrefslogtreecommitdiff
path: root/src/i830_accel.c
diff options
context:
space:
mode:
authorEric Anholt <eric@anholt.net>2008-12-03 13:17:26 -0800
committerEric Anholt <eric@anholt.net>2008-12-03 13:30:10 -0800
commit457a680afd0d8f835131ea72be0c3c618c2892c7 (patch)
tree4acdb7b68baa49b1fb31c87b0281bb598c253733 /src/i830_accel.c
parentb662ecccb5c036fcc4aa19026642bde0a1ca2ac8 (diff)
Enable tiling for DRI2 back/depth buffers.
This results in allocation overhead for small (8x8-128x128 or so) pixmaps with DRI2, but we're interested in looking at tiling them in general in the near future, anyway.
Diffstat (limited to 'src/i830_accel.c')
-rw-r--r--src/i830_accel.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/i830_accel.c b/src/i830_accel.c
index c01076a5..7dff714f 100644
--- a/src/i830_accel.c
+++ b/src/i830_accel.c
@@ -337,6 +337,10 @@ I830AccelInit(ScreenPtr pScreen)
pI830->accel_max_x = 2048;
pI830->accel_max_y = 2048;
}
+ /* Bump the pitch so that we can tile any pixmap we create. */
+ if (pI830->directRenderingType >= DRI_DRI2)
+ pI830->accel_pixmap_pitch_alignment = 512;
+
switch (pI830->accel) {
case ACCEL_UXA:
#ifdef I830_USE_UXA