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authorOwain G. Ainsworth <oga@openbsd.org>2010-03-01 14:24:52 +0000
committerOwain G. Ainsworth <oga@openbsd.org>2010-03-01 14:24:52 +0000
commitb2c57071f2503488a5976f820bebb69a61020ae0 (patch)
tree39214055a0083117dbdb677c49e56fa9e284ff28 /src/i830_accel.c
parent152c35e4764f9042588b53734575ec5ab0536af3 (diff)
Rename the xf86 screen private from pScrn to scrn.
(cherry picked from commit af27a3a0a5645c6f41f583611bd0f2559dc7cb2f) Conflicts: src/i830.h src/i830_accel.c src/i830_batchbuffer.c src/i830_display.h src/i830_driver.c src/i830_memory.c src/i830_video.c
Diffstat (limited to 'src/i830_accel.c')
-rw-r--r--src/i830_accel.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/src/i830_accel.c b/src/i830_accel.c
index a4f1d945..c990958a 100644
--- a/src/i830_accel.c
+++ b/src/i830_accel.c
@@ -51,8 +51,8 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
unsigned long intel_get_pixmap_offset(PixmapPtr pPix)
{
ScreenPtr pScreen = pPix->drawable.pScreen;
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- intel_screen_private *intel = intel_get_screen_private(pScrn);
+ ScrnInfoPtr scrn = xf86Screens[pScreen->myNum];
+ intel_screen_private *intel = intel_get_screen_private(scrn);
return (unsigned long)pPix->devPrivate.ptr - (unsigned long)intel->FbBase;
}
@@ -63,9 +63,9 @@ unsigned long intel_get_pixmap_pitch(PixmapPtr pPix)
}
int
-I830WaitLpRing(ScrnInfoPtr pScrn, int n, int timeout_millis)
+I830WaitLpRing(ScrnInfoPtr scrn, int n, int timeout_millis)
{
- intel_screen_private *intel = intel_get_screen_private(pScrn);
+ intel_screen_private *intel = intel_get_screen_private(scrn);
I830RingBuffer *ring = &intel->ring;
int iters = 0;
unsigned int start = 0;
@@ -121,25 +121,25 @@ I830WaitLpRing(ScrnInfoPtr pScrn, int n, int timeout_millis)
return iters;
}
-void I830Sync(ScrnInfoPtr pScrn)
+void I830Sync(ScrnInfoPtr scrn)
{
- intel_screen_private *intel = intel_get_screen_private(pScrn);
+ intel_screen_private *intel = intel_get_screen_private(scrn);
if (I810_DEBUG & (DEBUG_VERBOSE_ACCEL | DEBUG_VERBOSE_SYNC))
ErrorF("I830Sync\n");
- if (!pScrn->vtSema || !intel->batch_bo)
+ if (!scrn->vtSema || !intel->batch_bo)
return;
- I830EmitFlush(pScrn);
+ I830EmitFlush(scrn);
- intel_batch_flush(pScrn, TRUE);
- intel_batch_wait_last(pScrn);
+ intel_batch_flush(scrn, TRUE);
+ intel_batch_wait_last(scrn);
}
-void I830EmitFlush(ScrnInfoPtr pScrn)
+void I830EmitFlush(ScrnInfoPtr scrn)
{
- intel_screen_private *intel = intel_get_screen_private(pScrn);
+ intel_screen_private *intel = intel_get_screen_private(scrn);
int flags = MI_WRITE_DIRTY_STATE | MI_INVALIDATE_MAP_CACHE;
if (IS_I965G(intel))
@@ -168,8 +168,8 @@ void i830_debug_sync(ScrnInfoPtr scrn)
*/
Bool I830AccelInit(ScreenPtr pScreen)
{
- ScrnInfoPtr pScrn = xf86Screens[pScreen->myNum];
- intel_screen_private *intel = intel_get_screen_private(pScrn);
+ ScrnInfoPtr scrn = xf86Screens[pScreen->myNum];
+ intel_screen_private *intel = intel_get_screen_private(scrn);
/* Limits are described in the BLT engine chapter under Graphics Data Size
* Limitations, and the descriptions of SURFACE_STATE, 3DSTATE_BUFFER_INFO,