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authorEric Anholt <eric@anholt.net>2006-12-05 10:01:31 -0800
committerEric Anholt <eric@anholt.net>2006-12-05 12:15:34 -0800
commite777d38ce98d7220621b049b09df1deca5a5df42 (patch)
tree441a22533d263d5e1a2778f9bc560c99bcc54568 /src/i830_crt.c
parent81dde11d419c8f9198ab3502d9813d66d0bc6d6d (diff)
WIP code to move mode set sequencing to XFree86 handlers.
It compiles. It definitely doesn't run.
Diffstat (limited to 'src/i830_crt.c')
-rw-r--r--src/i830_crt.c20
1 files changed, 11 insertions, 9 deletions
diff --git a/src/i830_crt.c b/src/i830_crt.c
index 7a706d14..ebd83bc4 100644
--- a/src/i830_crt.c
+++ b/src/i830_crt.c
@@ -93,13 +93,16 @@ i830_crt_mode_valid(xf86OutputPtr output, DisplayModePtr pMode)
return MODE_OK;
}
-static void
-i830_crt_pre_set_mode (xf86OutputPtr output, DisplayModePtr pMode)
+static Bool
+i830_crt_mode_fixup(xf86OutputPtr output, DisplayModePtr mode,
+ DisplayModePtr adjusted_mode)
{
+ return TRUE;
}
static void
-i830_crt_post_set_mode (xf86OutputPtr output, DisplayModePtr pMode)
+i830_crt_mode_set(xf86OutputPtr output, DisplayModePtr mode,
+ DisplayModePtr adjusted_mode)
{
ScrnInfoPtr pScrn = output->scrn;
I830Ptr pI830 = I830PTR(pScrn);
@@ -122,11 +125,10 @@ i830_crt_post_set_mode (xf86OutputPtr output, DisplayModePtr pMode)
OUTREG(dpll_md_reg, dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
}
- adpa = ADPA_DAC_ENABLE;
-
- if (pMode->Flags & V_PHSYNC)
+ adpa = 0;
+ if (adjusted_mode->Flags & V_PHSYNC)
adpa |= ADPA_HSYNC_ACTIVE_HIGH;
- if (pMode->Flags & V_PVSYNC)
+ if (adjusted_mode->Flags & V_PVSYNC)
adpa |= ADPA_VSYNC_ACTIVE_HIGH;
if (i830_crtc->pipe == 0)
@@ -372,8 +374,8 @@ static const xf86OutputFuncsRec i830_crt_output_funcs = {
.save = i830_crt_save,
.restore = i830_crt_restore,
.mode_valid = i830_crt_mode_valid,
- .pre_set_mode = i830_crt_pre_set_mode,
- .post_set_mode = i830_crt_post_set_mode,
+ .mode_fixup = i830_crt_mode_fixup,
+ .mode_set = i830_crt_mode_set,
.detect = i830_crt_detect,
.get_modes = i830_crt_get_modes,
.destroy = i830_crt_destroy