diff options
| author | Hong Liu <hong.liu@intel.com> | 2008-02-04 17:14:23 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-02-04 17:14:23 +0800 |
| commit | 95327571134d8ebb9d936d80b70c2f642393aa9f (patch) | |
| tree | a246dd7b852e48bd7456bd008678a1e7a7384f7c /src/i830_debug.c | |
| parent | be1b568bc2379856c3eaaed365002512bebc218c (diff) | |
Bug 10773: fix i8xx pll p2 value in i830_crtc_clock_get()
Also fix debug dump, slightly modified to use macro instead.
Diffstat (limited to 'src/i830_debug.c')
| -rw-r--r-- | src/i830_debug.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/i830_debug.c b/src/i830_debug.c index 8f8ef9bb..5b70cd9c 100644 --- a/src/i830_debug.c +++ b/src/i830_debug.c @@ -191,7 +191,11 @@ DEBUGSTRING(i830_debug_dpll) mode = "LVDS"; p1 = ffs((val & DPLL_FPA01_P1_POST_DIV_MASK_I830_LVDS) >> DPLL_FPA01_P1_POST_DIV_SHIFT); - p2 = 14; + if ((INREG(LVDS) & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP) + p2 = I8XX_P2_LVDS_SLOW; + else + p2 = I8XX_P2_LVDS_FAST; + } else { mode = "DAC/serial"; if (val & PLL_P1_DIVIDE_BY_TWO) { |