diff options
| author | Eric Anholt <eric@anholt.net> | 2008-12-29 13:42:44 -0800 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2008-12-30 16:02:42 -0800 |
| commit | 830bf916724afd21b7947f797c22a8c8aab7a0a4 (patch) | |
| tree | 28cf10efb5fc84b9fba678eaa3ac5aec0375e27d /src/i830_display.c | |
| parent | d96f774d1bb39640486c72338fe8b19ee1ceaa23 (diff) | |
Don't touch the pipestat regs for detecting FIFO underrun. The kernel owns them.
Since we don't perform any synchronization with the kernel on these regs, we
could race with the kernel to write stale values and end up not having vblank
interrupts enabled when somebody was waiting on one.
Diffstat (limited to 'src/i830_display.c')
| -rw-r--r-- | src/i830_display.c | 4 |
1 files changed, 0 insertions, 4 deletions
diff --git a/src/i830_display.c b/src/i830_display.c index 2e5d55a0..7a9999a2 100644 --- a/src/i830_display.c +++ b/src/i830_display.c @@ -1202,7 +1202,6 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, int dspstride_reg = (plane == 0) ? DSPASTRIDE : DSPBSTRIDE; int dsppos_reg = (plane == 0) ? DSPAPOS : DSPBPOS; int dspsize_reg = (plane == 0) ? DSPASIZE : DSPBSIZE; - int pipestat_reg = (pipe == 0) ? PIPEASTAT : PIPEBSTAT; int i, num_outputs = 0; int refclk; intel_clock_t clock; @@ -1514,9 +1513,6 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, #endif i830WaitForVblank(pScrn); - - /* Clear any FIFO underrun status that may have occurred normally */ - OUTREG(pipestat_reg, INREG(pipestat_reg) | FIFO_UNDERRUN); } |