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authorEric Anholt <eric@anholt.net>2009-04-21 15:49:01 -0700
committerEric Anholt <eric@anholt.net>2009-04-27 17:05:59 -0700
commite5133a94dc78411eaef324131ea8056aeb81779e (patch)
treef6ef2a10a7e175e33605cd678d6719d0e136619c /src/i830_display.c
parent4653a7db622ad54a3182d93c81331765d930db34 (diff)
unifdef LIBPCIACCESS and XSERVER_LIBPCIACCESS.
Depending on new server means these are always present.
Diffstat (limited to 'src/i830_display.c')
-rw-r--r--src/i830_display.c9
1 files changed, 0 insertions, 9 deletions
diff --git a/src/i830_display.c b/src/i830_display.c
index c1617e3a..a7eafb97 100644
--- a/src/i830_display.c
+++ b/src/i830_display.c
@@ -1350,11 +1350,7 @@ i830_get_core_clock_speed(ScrnInfoPtr pScrn)
else if (IS_I915GM(pI830)) {
uint16_t gcfgc;
-#if XSERVER_LIBPCIACCESS
pci_device_cfg_read_u16 (pI830->PciInfo, &gcfgc, I915_GCFGC);
-#else
- gcfgc = pciReadWord(pI830->PciTag, I915_GCFGC);
-#endif
if (gcfgc & I915_LOW_FREQUENCY_ENABLE)
return 133000;
else {
@@ -1369,14 +1365,9 @@ i830_get_core_clock_speed(ScrnInfoPtr pScrn)
} else if (IS_I865G(pI830))
return 266000;
else if (IS_I855(pI830)) {
-#if XSERVER_LIBPCIACCESS
struct pci_device *bridge = intel_host_bridge ();
uint16_t hpllcc;
pci_device_cfg_read_u16 (bridge, &hpllcc, I855_HPLLCC);
-#else
- PCITAG bridge = pciTag(0, 0, 0); /* This is always the host bridge */
- uint16_t hpllcc = pciReadWord(bridge, I855_HPLLCC);
-#endif
/* Assume that the hardware is in the high speed state. This
* should be the default.