diff options
| author | Keith Packard <keithp@mactel.(none)> | 2006-06-04 00:15:06 -0700 |
|---|---|---|
| committer | Keith Packard <keithp@mactel.(none)> | 2006-06-04 00:15:06 -0700 |
| commit | 34f6a8204f1edec015283fc6b5f196e47897e3de (patch) | |
| tree | 95d6caca2aea6ac7dbbc5a6d28865eb1bb689fe6 /src/i830_display.c | |
| parent | c1c46f882f9a11c383c8d1d1ce393be8fda55ed0 (diff) | |
Get sDVO output working on mac mini.
Add lots of register debugging to track delta from BIOS settings.
Fix various mode settings to mirror BIOS sDVO values.
Disable analog/lvds output on pipe with sDVO.
Borrow Dave Airlie's I830xf86ValidateDDCModes code.
Fix various sDVO I2C messages to mirror Dave's code.
Diffstat (limited to 'src/i830_display.c')
| -rw-r--r-- | src/i830_display.c | 30 |
1 files changed, 20 insertions, 10 deletions
diff --git a/src/i830_display.c b/src/i830_display.c index 95fa936d..d49da1f5 100644 --- a/src/i830_display.c +++ b/src/i830_display.c @@ -34,6 +34,7 @@ #include "i830.h" #include "i830_bios.h" #include "i830_display.h" +#include "i830_debug.h" /** Returns the pixel clock for the given refclk and divisors. */ static int i830_clock(int refclk, int m1, int m2, int n, int p1, int p2) @@ -255,7 +256,8 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe) int m1 = 0, m2 = 0, n = 0, p1 = 0, p2 = 0; CARD32 dpll = 0, fp = 0, temp; CARD32 htot, hblank, hsync, vtot, vblank, vsync, dspcntr; - CARD32 pipesrc, dspsize, adpa, sdvoc = 0; + CARD32 pipesrc, dspsize, adpa; + CARD32 sdvob = 0, sdvoc= 0; Bool ok, is_sdvo; int refclk, pixel_clock; int outputs; @@ -391,13 +393,14 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe) ErrorF("DVOB: %08x\nDVOC: %08x\n", (int)INREG(SDVOB), (int)INREG(SDVOC)); - sdvoc = INREG(SDVOC) & SDVO_PRESERVE_MASK; - sdvoc |= SDVO_ENABLE; + sdvob = INREG(SDVOB) & SDVOB_PRESERVE_MASK; + sdvoc = INREG(SDVOC) & SDVOC_PRESERVE_MASK; + sdvob |= SDVO_ENABLE | (9 << 19) | SDVO_BORDER_ENABLE; + sdvoc |= 9 << 19; if (pipe == 1) - sdvoc |= SDVO_PIPE_B_SELECT; - // sdvoc |= SDVO_PHASE_SELECT_DEFAULT; - sdvoc |= SDVO_BORDER_ENABLE; + sdvob |= SDVO_PIPE_B_SELECT; OUTREG(SDVOC, INREG(SDVOC) & ~SDVO_ENABLE); + OUTREG(SDVOB, INREG(SDVOB) & ~SDVO_ENABLE); } fp = ((n - 2) << 16) | ((m1 - 2) << 8) | (m2 - 2); @@ -434,7 +437,10 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe) FatalError("unknown display bpp\n"); } - adpa = ADPA_DAC_ENABLE; + if (is_sdvo) + adpa = ADPA_DAC_DISABLE; + else + adpa = ADPA_DAC_ENABLE; if (pMode->Flags & V_PHSYNC) adpa |= ADPA_HSYNC_ACTIVE_HIGH; if (pMode->Flags & V_PVSYNC) @@ -466,9 +472,6 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe) OUTREG(FPA0, fp); OUTREG(DPLL_A, dpll); - if (is_sdvo) - OUTREG(SDVOC, sdvoc); - OUTREG(HTOTAL_A, htot); OUTREG(HBLANK_A, hblank); OUTREG(HSYNC_A, hsync); @@ -487,6 +490,11 @@ i830PipeSetMode(ScrnInfoPtr pScrn, DisplayModePtr pMode, int pipe) /* And then turn the plane on */ OUTREG(DSPACNTR, dspcntr); + + if (is_sdvo) { + OUTREG(SDVOB, sdvob); + OUTREG(SDVOC, sdvoc); + } } else { /* Always make sure the LVDS is off before we play with DPLLs and pipe * configuration. @@ -637,6 +645,8 @@ done: I830DRIUnlock(pScrn); #endif + i830DumpRegs (pScrn); + I830DumpSDVO (pScrn); return ok; } |