diff options
| author | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-07-31 13:13:45 +0800 |
|---|---|---|
| committer | Zhenyu Wang <zhenyu.z.wang@intel.com> | 2008-07-31 13:13:45 +0800 |
| commit | 77ed3d7600c1d92bf4a3ef4f54405cde8c232986 (patch) | |
| tree | 069df8844fb10b746d7e365183d5899c182de46c /src/i830_display.c | |
| parent | 42fb06f3f14fbec070350cf48361be4a0be0af04 (diff) | |
Don't program dsparb on new Intel chip
On new chip, DSPARB is controlled by hardware only.
Diffstat (limited to 'src/i830_display.c')
| -rw-r--r-- | src/i830_display.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/i830_display.c b/src/i830_display.c index 61764475..2e1de41f 100644 --- a/src/i830_display.c +++ b/src/i830_display.c @@ -1510,7 +1510,8 @@ i830_crtc_mode_set(xf86CrtcPtr crtc, DisplayModePtr mode, i830WaitForVblank(pScrn); - i830_update_dsparb(pScrn); + if (!DSPARB_HWCONTROL(pI830)) + i830_update_dsparb(pScrn); /* Clear any FIFO underrun status that may have occurred normally */ OUTREG(pipestat_reg, INREG(pipestat_reg) | FIFO_UNDERRUN); |